參數(shù)資料
型號: DAC1627D1G25
廠商: NXP SEMICONDUCTORS
元件分類: DAC
中文描述: PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PQCC72
封裝: 10 X 10 MM, 0.85 MM HEIGHT, PLASTIC, SOT813-3, HVQFN-72
文件頁數(shù): 46/69頁
文件大?。?/td> 1677K
代理商: DAC1627D1G25
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10.18.4
Page 1 allocation map
D
A
O
R
4
N
D
D
Table 55
shows an overview of all registers on page 1 (01h in hexadecimal). See
Section 10.18.5
for detailed descriptions of
the registers.
Table 55.
Address
Page 1 register allocation map
Register name
R/W
Bit definition
Bit 4
MDS_
NCO
Default
[1]
Bin
0000
0100
Bit 7
MDS_EQCHECK[1:0]
Bit 6
Bit 5
MDS_
RUN
Bit 3
MDS_
NCO_
PULSE
Bit 2
MDS_
SREF_
DIS
Bit 1
MDS_
MASTER
Bit 0
MDS_
ENA
Hex
04h
0
00h
MDS_MAIN
R/W
1
01h
MDS_WIN_PERIOD_A
R/W
MDS_WIN_PERIOD_A[7:0]
1000
0000
0100
0000
0001
0000
80h
2
02h
MDS_WIN_PERIOD_B
R/W
MDS_WIN_PERIOD_B[7:0]
40h
3
03h
MDS_MISCCNTRL0
R/W
-
-
-
MDS_
EVAL_
ENA
MDS_MAN_ADJUSTDLY[6:0]
MDS_
PRERUN_E
MDS_PULSEWIDTH[2:0]
10h
4
04h
MDS_MAN_ADJUSTDLY R/W
MDS_
MAN
0100
0000
1000
0000
0000
1111
0000
0000
0000
0000
uuuu
uuuu
uuuu
uuuu
0000
0011
0000
0011
0000
0011
40h
5
05h
MDS_AUTO_CYCLES
R/W
MDS_AUTO_CYCLES[7:0]
80h
6
06h
MDS_MISCCNTRL1
R/W
MDS_SR_
CKEN
-
MDS_SR_
LOCKOUT
-
MDS_
SR_LOCK
-
MDS_
RELOCK
MDS_LOCK_DELAY[3:0]
0Fh
7
07h
MDS_OFFSET_DLY
RW
MDS_OFFSET_DLY[4:0]
00h
8
08h
MDS_ADJDELAY
RW
-
MDS_ADJDELAY[6:0]
00h
9
09h
MDS_STATUS0
R
EARLY
LATE
EQUAL
MDS_EQ
EARLY_
ERROR
LATE_
ERROR
MDS_
PRERUN
DAC_AUX_BIAS[3:0]
EQUAL_
FOUND
MDS_
LOCKOUT
MDS_
ACTIVE
MDS_
LOCK
uuh
10
0Ah
MDS_STATUS1
R
-
-
ADD_ERR
MDS_EN_PHASE[1:0]
uuh
14
0Eh
DAC_CURRENT_AUX
R/W
-
-
-
-
03h
15
0Fh
DAC_CURRENT_0
R/W
-
-
-
-
DAC_DIG_BIAS[3:0]
03h
16
10h
DAC_CURRENT_1
R/W
-
-
-
-
DAC_MST_BIAS[3:0]
03h
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