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參數(shù)資料
| 型號(hào)： | CS5376A-IQZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 27/49頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FILTER DGTL MULTI-CH 64-TQFP |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 濾波器類型： | 數(shù)字 |
| 濾波器數(shù)： | 4 |
| 濾波器階數(shù)： | 2nd |
| 電源電壓： | 3 V ~ 5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應(yīng)商設(shè)備封裝： | 64-TQFP（10x10） |
| 包裝： | 管件 |
| 配用： | 598-1778-ND - EVALUATION BOARD FOR CS5376 |
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2008 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FUSB2805 Rev. 1.0.3
33
F
USB2
8
0
5
—
USB2
.0
High
-S
pee
d
OTG
Tra
nsc
e
iv
e
rw
ith
UL
P
I
Inter
fac
e
Serial Modes
3-pin serial modes as controlled in the INTF_CTRL
register via the 6-pin and 3-pin register bits.
Please refer to ULPI specification, section 3.10 for
details on the 3-pin and 6-pin serial mode functionality.
DATA[0]
Tx_Enable
DATA[1]
Tx_DAT/
RX_RCV
DATA[2]
Tx_SE0/
RX_SE0
DP
DM
TRANSMIT
SYNC
DATA
EOP
SYNC
DATA
EOP
RECEIVE
Figure 21.
3-Pin Serial Mode
– Transmit and Receive Example
DATA[0]
Tx_Enable
DATA[1]
Tx_DAT
DATA[2]
Tx_SE0
DP
DM
TRANSMIT
SYNC
DATA
EOP
SYNC
DATA
EOP
RECEIVE
DATA[5]
Rx_DM
DATA[6]
Rx_RCV
DATA[4]
Rx_DP
Figure 22.
6-Pin Serial Mode
– Transmit and Receive Example
Avoiding Contention on the ULPI Data Bus
Because the ULPI data bus is bi-directional, it is
necessary to avoid situations in which both the link and
FUSB2805 drive the data bus simultaneously.
The following points should be considered while
implementing the data bus drive control on the link.
After the power-up and clock stabilization, the default
states are:
FUSB2805 drives DIR=0.
Data bus is an INPUT to FUSB2805.
HOST/LINK ULPI data bus is OUTPUT (with all
data bus bits driven to 0).
When FUSB2805 wants to take control of data bus to
initiate a data transfer, it changes DIR value from 0 to 1.
At this point, HOST/LINK should disable its output pad
buffers. This needs to be as fast as possible, so LINK
should use a combinational path from DIR.
FUSB2805
does
not
enable
its
output
buffers
immediately, but delays the enabling buffers until the
next clock edge, avoiding bus contention.
When data transfer is no longer required by the
FUSB2805, it changes DIR from 1 to 0 and starts to turn
off its output drivers immediately. The HOST/LINK
senses the change of DIR from 1 to 0, but delays
enabling its output buffers for one CLOCK cycle,
thereby avoiding data bus contention.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS5376A-IQZR | 功能描述:特殊用途放大器 LP Multi-Ch. Decimation Filter RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補(bǔ)償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
| CS5376-BQ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CS5378 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-power Single-channel Decimation Filter |
| CS5378_08 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-power Single-channel Decimation Filter |
| CS5378-IS | 功能描述:特殊用途放大器 IC LP Single-Ch Decimation Filter RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補(bǔ)償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
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