
CHRONTEL
Table 14: Video Bandwidth
CH7012A
26
201-0000-042 Rev. 1.1, 9/29/2000
Bit 6 of register CVBWB controls whether the chroma sub-carrier free-runs, or is locked to the video signal. A
‘1’ causes the sub-carrier to lock to the TV vertical rate, and should be used when the CIVEN bit (register 10h)
is set to ‘0’. A ‘0’ causes the sub-carrier to free-run, and should be used when the CIVEN bit is set to ‘1’.
Bit 7 of register CVBWB controls the vertical blanking interval defeat function. A ‘1’ in this register location
forces the flicker filter to minimum filtering during the vertical blanking interval. A ‘0’ in this location causes
the flicker filter to remain at the same setting inside and outside of the vertical blanking interval.
Text Enhancement Register
Symbol:
TE
Address:
03h
Bits:
6
Bits 2-0 of register TE control the text enhancement circuitry within the CH7012. A value of ‘000’ minimizes the
enhancement feature, while a value of ‘111’ maximizes the enhancement.
Bits 5-3 of register TE contain the MSB values for the start of active video, horizontal position and vertical position
controls. They are described in detail in the SAV, HP and VP register descriptions.
26
27
28
29
30
31
32
33
34
35
36
37
38
0.945
1.100
0.859
0.942
1.030
0.804
0.919
1.030
0.767
0.862
0.965
0.709
0.466
1.310
1.520
1.190
1.300
1.420
1.110
1.270
1.430
1.060
1.190
1.330
0.979
0.643
3.510
4.100
3.190
3.500
3.830
2.990
3.410
3.840
2.850
3.200
3.580
2.630
1.730
4.100
4.780
3.720
4.080
4.470
3.480
3.980
4.480
3.320
3.740
4.180
3.070
2.020
5.400
6.300
4.910
5.380
5.890
4.590
5.250
5.910
4.380
4.930
5.510
4.050
2.660
8.960
10.400
8.140
8.920
9.770
7.620
8.710
9.790
7.260
8.170
9.140
6.720
4.410
BIT:
7
6
5
4
3
2
1
0
SYMBOL:
TYPE:
DEFAULT:
SAV8
R/W
HP8
R/W
VP8
R/W
TE2
R/W
TE1
R/W
TE0
R/W
0
0
0
1
0
1