參數(shù)資料
型號: C1210
廠商: IMP INC.
英文描述: Process C1210 CMOS 1.2mm Zero Threshold Devices
中文描述: 1.2mm的過程C1210零閾值的CMOS器件
文件頁數(shù): 3/4頁
文件大小: 35K
代理商: C1210
49
IMP, Inc.
Process C1210
Starting Material
Starting Mat. Resistivity
Typ. Operating Voltage
Well Type
Metal Layers
Poly Layers
Contact Size
Via Size
Metal-1 Width/Space
Metal-2 Width/Space
Gate Poly Width/Space
EPI P <100>
7 - 8.5
-cm
5V
N-well
2
2
1.5x1.5
μ
m
1.5x1.5
μ
m
2.5 / 1.5
μ
m
2.5 / 1.5
μ
m
1.5 / 2.0
μ
m
N+/P+ Width/Space
N+ To P+ Space
Contact To Poly Space
Contact Overlap Of Diffusion
Contact Overlap Of Poly
Metal-1 Overlap Of Contact
Metal-1 Overlap Of Via
Metal-2 Overlap Of Via
Minimum Pad Opening
Minimum Pad-to-Pad Spacing
Minimum Pad Pitch
2.5/ 2.0
μ
m
9.0
μ
m
1.5
μ
m
1.0
μ
m
1.0
μ
m
1.0
μ
m
1.0
μ
m
1.0
μ
m
65x65
μ
m
5.0
μ
m
80.0
μ
m
Special Feature of C1210 Process: This process offers zero threshold n- and p-channel
transistors in addition to normal threshold transistors of CMOS 1.2
μ
m technology.
Physical Characteristics
Metal 2
Metal 1
SIO
2
VIA
Metal 1
LTO
n
+
n
+
p
n
+
p
+
p
Field Oxide
N
S
P
N-well
D
C
D
L
P
S
S
p
C
S
B
C
P
p
+
substrate
p
epi
p
+
p
+
LTO
5.5
VGS = 4.0V
VGS = 3.0V
VGS = 2.0V
VGS = 1.0V
VGS = 0V
ID vs VD, W/L = 20/1.2
.000
1
2
3
4
5
D
I
0.55 mA
/div
Drain Voltage (v) VDS
n-ch Transistor IV characteristics of a 20/1.2 device
-3.0
VGS = –5.0V
VGS = –4.0V
VGS = –3.0V
VGS = –2.0V
VGS = –1.0V
VGS = 0.0V
–4
ID vs VD, W/L = 20/1.2
.000
–1
–2
–3
–5
D
I
0.3 mA
/div
Drain Voltage (v) VDS
p-ch Transistor IV characteristics of a 20/1.2 device
Cross-Sectional view of the LVMOS process
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