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參數(shù)資料
| 型號(hào)： | BU-65527M4-200 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), MIL-STD-1553 CONTROLLER, XMA |
| 文件頁數(shù)： | 7/32頁 |
| 文件大?。?/td> | 2094K |
| 代理商： | BU-65527M4-200 |
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15
Data Device Corporation
www.ddc-web.com
BU-65528 and BU-65527
F1 web-10/02-0
all transmit, receive, and broadcast subaddresses. In the Single
Message mode (also in the Double-Buffer and Circular-Buffer
modes), there is a global-double-buffering scheme, controlled by
bit 13 of Configuration Register #1. This selects from between
the two sets of the various data structures shown in the figure:
the Stack Pointers (fixed addresses), Descriptor Stacks (user
defined addresses), RT Lookup Tables (fixed addresses), and
RT Data Word blocks (user defined addresses). FIGURES 5, 6,
and 7 delineate the “active” and “non-active” areas by the non-
shaded and shaded areas, respectively.
As shown, the ACE stores the Command Word from each mes-
sage received, in the fourth location within the message descrip-
tor (in the stack) for the respective message. The
bit, sub-
address field, and (optionally) broadcast/own address, index into
the active area Lookup Table, to locate the data block pointer for
the current message. The BU-65528/27 RT memory manage-
ment logic then accesses the data block pointer to locate the
starting address for the Data Word block for the current mes-
sage. The maximum size for an RT Data Word block is 32 words.
If a particular subaddress is set to the Single Message mode,
there is a possibility that the contents of the receive data block
may be overwritten or that the transmit data block may be over-
read. In the single message mode it is possible to access multi-
ple data blocks for the same subaddress. This, however, requires
the intervention of the host processor to update the respective
lookup table pointer. The Circular buffering mode, on the other
R
/
T
The fourth section of each of the RT Lookup Tables stores the 32
Subaddress Control Words (refer to TABLE 17 and TABLE 36).
The individual Subaddress Control Words may be used to select
the RT memory management option and interrupt scheme for
each transmit, receive, and (optionally) broadcast subaddress.
For each transmit subaddress, there are two possible memory
management schemes: (1) single message; and (2) circular
buffer. For each receive (and optionally broadcast) subaddress,
there are three possible memory management schemes: (1) sin-
gle message; (2) double buffered; and (3) circular buffer. For
each transmit, receive and broadcast subaddress, there are two
interrupt conditions programmable by the respective Subaddress
Control Word: (1) after every message to the subaddress; (2)
after a circular buffer rollover. An additional table in RAM may be
used to enable interrupts following selected mode code mes-
sages.
When using the circular buffer scheme for a given subaddress,
the size of the circular buffer is programmable by three bits of the
Subaddress Control Word (see TABLE 36). The options for cir-
cular buffer size are 128, 256, 512, 1024, 2048, 4096, and 8192
Data Words.
SINGLE MESSAGE MODE
FIGURE 5 illustrates the RT Single Message memory manage-
ment scheme. When operating the BU-65528/27 in its “AIM-HY”
(default) mode, the Single Message scheme is implemented for
DATA
BLOCKS
DATA BLOCK
BLOCK STATUS WORD
TIME TAG WORD
DATA BLOCK POINTER
RECEIVED COMMAND
WORD
DESCRIPTOR
STACKS
LOOK-UP
TABLE ADDR
LOOK-UP TABLE
(DATA BLOCK ADDR)
15
13
0
CURRENT
AREA B/A
CONFIGURATION
REGISTER
STACK
POINTERS
FIGURE 5. RT MEMORY MANAGEMENT: SINGLE MESSAGE MODE
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