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參數(shù)資料
| 型號： | BU-65527M4-200 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), MIL-STD-1553 CONTROLLER, XMA |
| 文件頁數(shù)： | 10/32頁 |
| 文件大?。?/td> | 2094K |
| 代理商： | BU-65527M4-200 |
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18
Data Device Corporation
www.ddc-web.com
BU-65528 and BU-65527
F1 web-10/02-0
As in BC mode, the Time Tag Word stores the current contents
of the BU-65528/27's read/writable Time Tag Register. The reso-
lution of the Time Tag Register is programmable from among 2,
4, 8, 16, 32, and 64
s/LSB. Also, incrementing of the Time Tag
counter may be from an external clock source or via software
command.
The ACE stores the contents of the accessed Lookup Table loca-
tion for the current message, indicating the starting location of
the Data Word block, as the Data Block Pointer. This serves as a
convenience in locating stored message data blocks. The ACE
stores the full 16-bit 1553 Command Word in the fourth location
of the RT message descriptor.
RT COMMAND ILLEGALIZATION
The BU-65528/27 provides an internal mechanism for RT com-
mand illegalization. In addition, there is a means for allowing the
setting of the Busy Status Word bit to be only for a programmed
subset of the transmit/receive/broadcast subaddresses.
The illegalization scheme uses a 256-word area in the BU-
65528/27's address space. A benefit of this feature is the reduc-
tion of printed circuit board requirements, by eliminating the need
for an external PROM, PLD, or RAM device that does the illegal-
izing function. The BU-65528/27's illegalization scheme provides
maximum flexibility, allowing any subset of the 4096 possible
combinations of broadcast/own address,
bit, subaddress,
and word count/mode code to be illegalized. Another advantage
of the RAM-based illegalization technique is that it provides for a
high degree of self-test ability.
Addressing The Illegalization Table
TABLE 37 illustrates the addressing scheme of the illegalization
RAM. As shown, the base address of the illegalizing RAM is
word address 0300(hex) in the shared RAM. The ACE formulates
the index into the Illegalizing Table based on the values of
BROADCAST/OWN ADDRESS,
bit, Subaddress, and the
MSB of the Word Count/Mode Code field (WC/MC4) of the cur-
rent Command Word.
The internal RAM has 256 words reserved for command illegal-
ization. Broadcast commands may be illegalized separately from
non-broadcast receive commands and mode commands.
Commands may be illegalized down to the word count level. For
example, a one-word receive command to subaddress 1 may be
legal, while a 2-word receive command to subaddress 1 may be
illegalized.
The first 64 words of the Illegalization Table refer to broadcast
receive commands (two words per subaddress). The next 64
words refer to broadcast transmit commands. Since non-mode
code broadcast transmit commands are by definition invalid, this
section of the table (except for subaddresses 0 and 31) does not
need to be initialized by the user. The next 64 words correspond
to non-broadcast receive commands. The final 64 words refer to
non-broadcast transmit commands. Messages with Word Count/
Mode Code (WC/MC) fields between 0 and 15 may be illegalized
by setting the corresponding data bits for the respective even-
numbered address locations in the illegalization table. Likewise,
R
/
T
R
/
T
Data Block 356
2FE0-2FFF
Data Block 6
0420-043F
Data Block 5
0400-041F
Command Illegalizing Table (fixed area)
0300-03FF
RESERVED
Data Block 1-4
0280-02FF
Data Block 0
0260-027F
(not used)
0248-025F
Busy Bit Lookup Table (fixed area)
0240-0247
Lookup Table B (fixed area)
01C0-023F
Lookup Table A (fixed area)
0140-01BF
Mode Code Data (fixed area)
0110-013F
Mode Code Selective Interrupt Table (fixed area)
0108-010F
Stack Pointer B (fixed location)
0104
RESERVED
0101-0103
Stack Pointer A (fixed location)
0100
Stack A
0000-00FF
DESCRIPTION
ADDRESS
(HEX)
0105-0107
TABLE 34. TYPICAL RT MEMORY MAP (SHOWN FOR 12K RAM)
Note: Address represents the word offset from the memory base
address in the A24 or A32 memory address space.
TABLE 35. RT LOOK-UP TABLES
AREA A
AREA B
DESCRIPTION
COMMENT
0140
.
015F
01C0
.
01DF
Rx(/Bcst)_SA0
.
Rx(/Bcst)_SA31
Receive
(/Broadcast)
Lookup Table
0160
.
017F
01E0
.
01FF
Tx_SA0
.
Tx_SA31
Transmit
Lookup Table
0180
.
019F
0200
.
021F
Bcst_SA0
.
Bcst_SA31
Broadcast
Lookup Table
(Optional)
01A0
.
01BF
0220
.
023F
SACW_SA0
.
SACW_SA31
Subaddress
Control Lookup
Table
(Optional)
Note: Address represents the word offset from the memory base
address in the A24 or A32 memory address space.
TABLE 36. SUBADDRESS CONTROL WORD
Memory Management Subaddress Buffer Scheme
MM2
MM1
MM0
DESCRIPTION
COMMENT
0
Single Message or Double Buffered
0
1
128-Word
Circular Buffer of
Specified Size
0
1
0
256-Word
0
1
512-Word
1
0
1024-Word
1
0
1
2048-Word
1
0
4096-Word
1
8192-Word
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BU-65527C3-300 | 3 CHANNEL(S), MIL-STD-1553 CONTROLLER, XMA |
| BU-65743F3-300 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80 |
| BU-65863F3-310 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80 |
| BU-65743F3-200 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80 |
| BU-65863F3-220 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80 |
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