參數(shù)資料
型號： AX88790L
廠商： ASIX Electronics Corporation
英文描述： 10/100BASE 3-in-1 PCMCIA Fast Ethernet Controller
中文描述： 一個(gè)10/100Base 3合1的PCMCIA快速以太網(wǎng)控制器
文件頁數(shù)： 11/60頁
文件大?。?/td> 633K
代理商： AX88790L
ASIX ELECTRONICS CORPORATION
11
AX88790 L 3-in-1 PCMCIA Fast Ethernet Controller
2.8 Miscellaneous pins group
SIGNAL
TYPE
LCLK/XTALIN
I
PIN NO.
79
DESCRIPTION
CMOS Local Clock: Typical a 25Mhz clock, +/- 100 PPM, 40%-60%
duty cycle. The signal not supports 5 Volts tolerance ( See application
note also )
Crystal Oscillator Input: Typical a 25Mhz crystal, +/- 25 PPM can be
connected across XTALIN and XTALOUT.
Crystal Oscillator Output: Typical a 25Mhz crystal, +/- 25 PPM can be
connected across XTALIN and XTALOUT. If a single-ended external
clock (LCLK) is connected to XTALIN, the crystal output pin should
be left floating.
Clock Output: This clock is source from LCLK/XTALIN.
Reset
Reset is active high then place AX88790 into reset mode immediately.
During falling edge the AX88790 loads the power on setting data.
And, after the falling edge the AX88790 loads the EEPROM data.
Test Pins
:
Active high
These pins are just for test mode setting purpose only. Must be pull
down or keep no connection when normal operation.
For test only. Must be pulled down at normal operation.
For test only. Must be pulled down or keep no connection when normal
operation.
FAST_MODE
:
Active LOW
The pin is just for test mode only. Must be pulled high or keep no
connection when normal operation.
EEPROM SIZE = 0: 93C46 type 128 byte EEPROM is used.
EEPROM SIZE = 1: 93C56 type 256 byte EEPROM is used.
This sets the common mode voltage for 10Base-T and 100Base-TX
modes. It should be connected to the center tap of the transmit side of
the transformer
Power Supply: +3.3V DC.
XTALOUT
O
80
CLKO25M
RESET
O
44
3
I/PU
TEST[2:1]
I/PD
47, 65
IDDQ
BIST
I
46
45
I/PD
FAST_MODE#
I/PU
59
EEPROM_SIZE
I/PU
58
ZVREG
O
92
VDD
P
13, 27, 40,
53, 57, 104,
114, 126
14, 28, 34,
43, 52, 54,
63, 64, 94,
105,115,
127
56, 69,
73, 82
55, 68,
72, 75, 85,
76
VSS
P
Power Supply: +0V DC or Ground.
VDDA
P
Power Supply for Analog Circuit: +3.3V DC.
VSSA
P
Power Supply for Analog Circuit: +0V DC or Ground.
VDDM
P
Powers the analog block around the transmit/receive area. This should
be connected to VDDA: +3.3V DC.
Powers the analog block around the transmit/receive area. This should
be connected to VSSA: +0V DC or Ground Power.
The Phase Detector (or PLL) power. This should be isolated with other
power: +3.3V DC.
The Phase Detector (or PLL) power. This should be isolated with other
power: +0V DC or Ground.
Power Supply for Transceiver Output Driver: +3.3V DC.
86, 89, 90 Power Supply for Transceiver Output Driver: +0V DC or Ground.
VSSM
P
77, 93
VDDPD
P
78
VSSPD
P
81
VDDO
VSSO
P
P
91
Tab – 8 Miscellaneous pins group
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