參數資料
型號: ATAM893T-TKSYD
廠商: Atmel
文件頁數: 47/98頁
文件大小: 0K
描述: IC MCU FLASH 4K MTP 20SSOP
標準包裝: 830
系列: MARC4
核心處理器: MARC4
芯體尺寸: 4-位
速度: 4MHz
連通性: SSI(2 線,3 線)
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數: 16
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: EEPROM
EEPROM 大?。?/td> 64 x 16
RAM 容量: 256 x 4
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 6.5 V
振蕩器型: 內部
工作溫度: -40°C ~ 125°C
封裝/外殼: 20-SOIC(0.209",5.30mm 寬)
包裝: 管件
51
4680C–4BMCU–01/05
ATAM893-D
Timer 3 – Mode 3:
Timer/Counter, Internal Trigger Restart and Internal Capture
(with TOG2)
The counter is driven by an internal or external (T3I) clock source. The output toggle signal of
Timer 2 resets the counter. The counter value before the reset is saved in the capture register. If
single-action mode is activated for one or both compare registers, the trigger signal restarts the
single actions. This mode can be used for frequency measurements or as event counter with
time gate (see section “Combination Mode 10”).
Figure 5-30. Event Counter with Time Gate
Timer 3 – Mode 4:
Timer/Counter
The timer runs as timer/counter in mode 1, but its output T3O is used as output for the Timer 2
output signal.
Timer 3 – Mode 5:
Timer/Counter, External Trigger Restart and External Capture
(with T3I Input)
The Timer 3 runs as timer/counter in mode 2, but its output T3O is used as output for the Timer
2 output signal.
5.3.3.3
Timer 3 Modulator/Demodulator Modes
Timer 3 – Mode 6:
Carrier Frequency Burst Modulation Controlled by Timer 2 Output
Toggle Flip–Flop (M2)
The Timer 3 counter is driven by an internal or external clock source. Its compare- and compare
mode registers must be programmed to generate the carrier frequency via the output toggle flip-
flop. The output toggle flip-flop of Timer 2 is used to enable or disable the Timer 3 output. Timer
2 can be driven by the toggle output signal of Timer 3 or any other clock source (see section
“Combination Mode 11”).
Timer 3 – Mode 7:
Carrier Frequency Burst Modulation Controlled by SSI Internal
Output (SO)
The Timer 3 counter is driven by an internal or external clock source. Its compare- and compare
mode registers must be programmed to generate the carrier frequency via the output toggle flip-
flop. The output (SO) of the SSI is used to enable or disable the Timer 3 output. The SSI should
be supplied with the toggle signal of Timer 2 (see section “Combination Mode 12”).
00 1 2 3 4 5 6 78 910
Counter 3
TOG2
T3CP-
Register
11
0 1
2
40 1
T3I
2
3
T3R
Capture value = 0
Capture value = 11
Capture value = 4
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