參數(shù)資料
型號: AT90S4433-8AC
廠商: Atmel
文件頁數(shù): 43/126頁
文件大?。?/td> 0K
描述: IC MCU 4K FLSH 8MHZ A/D 32TQFP
標準包裝: 250
系列: AVR® 90S
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 20
程序存儲器容量: 4KB(2K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
數(shù)據轉換器: A/D 6x10b
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 32-TQFP
包裝: 托盤
23
AT90S/LS4433
1042H–AVR–04/03
Note:
1. Or external Power-on Reset.
This table shows the Start-up times from Reset. From sleep, only the clock counting part
of the Start-up time is used. The Watchdog Oscillator is used for timing the Real Time
part of the Start-up time. The number WDT Oscillator cycles used for each time-out is
shown in Table 6.
The frequency of the Watchdog Oscillator is voltage dependent, as shown in the Electri-
cal Characteristics section.
Power-on Reset
A Power-on Reset (POR) pulse is generated by an On-chip Detection circuit. The detec-
tion level is nominally 2.2V. The POR is activated whenever V
CC is below the detection
level. The POR circuit can be used to trigger the Start-up Reset, as well as detect a fail-
ure in supply voltage.
The Power-on Reset (POR) circuit ensures that the device is Reset from Power-on.
Reaching the Power-on Reset threshold voltage invokes a delay counter, which deter-
mines the delay, for which the device is kept in RESET after V
CC rise. The Time-out
period of the delay counter is a combination of Internal RC Oscillator cycles and Exter-
nal Oscillator cycles, and it can be defined by the user through the CKSEL Fuses. The
eight different selections for the delay period are presented in Table 5. The RESET sig-
nal is activated again, without any delay, when the V
CC decreases to below detection
level.
Table 5. Reset Delay Selections
CKSEL
[2:0]
Start-up Time,
t
TOUT at VCC = 2.7V
Start-up Time,
t
TOUT at VCC = 5.0V
Recommended Usage
000
16 ms + 6 CK
4 ms + 6 CK
External Clock, slowly rising power
001
6 CK
External Clock, BOD enabled(1)
010
256 ms + 16K CK
64 ms + 16K CK
Crystal Oscillator
011
16 ms + 16K CK
4 ms + 16K CK
Crystal Oscillator, fast rising power
100
16K CK
Crystal Oscillator, BOD enabled(1)
101
256 ms + 1K CK
64 ms + 1K CK
Ceramic Resonator
110
16 ms + 1K CK
4 ms + 1K CK
Ceramic Resonator, fast rising power
111
1K CK
Ceramic Resonator, BOD enabled(1)
Table 6. Number of Watchdog Oscillator Cycles
Time-out
Number of Cycles
4.0 ms (at VCC = 5.0V)
4K
64 ms (at V
CC = 5.0V)
64K
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