參數(shù)資料
型號(hào): AT90S4433-8AC
廠商: Atmel
文件頁(yè)數(shù): 40/126頁(yè)
文件大?。?/td> 0K
描述: IC MCU 4K FLSH 8MHZ A/D 32TQFP
標(biāo)準(zhǔn)包裝: 250
系列: AVR® 90S
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 20
程序存儲(chǔ)器容量: 4KB(2K x 16)
程序存儲(chǔ)器類(lèi)型: 閃存
EEPROM 大小: 256 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x10b
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 32-TQFP
包裝: 托盤(pán)
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20
AT90S/LS4433
1042H–AVR–04/03
Stack Pointer – SP
The AT90S4433 Stack Pointer is implemented as an 8-bit register in the I/O space loca-
tion $3D ($5D). As the AT90S4433 data memory has $0DF locations, eight bits are
used.
The Stack Pointer points to the data SRAM stack area where the Subroutine and Inter-
rupt stacks are located. This stack space in the data SRAM must be defined by the
program before any subroutine calls are executed or interrupts are enabled. The Stack
Pointer must be set to point above $60. The Stack Pointer is decremented by one when
data is pushed onto the stack with the PUSH instruction, and it is decremented by two
when an address is pushed onto the Stack with subroutine calls and interrupts. The
Stack Pointer is incremented by one when data is popped from the stack with the POP
instruction, and it is incremented by two when an address is popped from the Stack with
return from subroutine RET or return from interrupt RETI.
Reset and Interrupt
Handling
The AT90S4433 provides 13 different interrupt sources. These interrupts and the sepa-
rate reset vector each have a separate Program Vector in the Program memory space.
All interrupts are assigned individual enable bits, which must be set (one) together with
the I-bit in the Status Register in order to enable the interrupt.
The lowest addresses in the Program memory space are automatically defined as the
Reset and Interrupt Vectors. The complete list of Vectors is shown in Table 3. The list
also determines the priority levels of the different interrupts. The lower the address, the
higher the priority level. RESET has the highest priority, and next is INT0 (the External
Interrupt Request 0), etc.
765
432
10
$3D ($5D)
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
SP
Read/Write
R/W
Initial Value
0
Table 3. Reset and Interrupt Vectors
Vector No.
Program
Address
Source
Interrupt Definition
1
$000
RESET
External Pin, Power-on Reset, Brown-out Reset
and Watchdog Reset
2
$001
INT0
External Interrupt Request 0
3
$002
INT1
External Interrupt Request 1
4
$003
TIMER1 CAPT
Timer/Counter1 Capture Event
5
$004
TIMER1 COMP
Timer/Counter1 Compare Match
6
$005
TIMER1 OVF
Timer/Counter1 Overflow
7
$006
TIMER0 OVF
Timer/Counter0 Overflow
8
$007
SPI, STC
Serial Transfer Complete
9
$008
UART, RX
UART, Rx Complete
10
$009
UART, UDRE
UART Data Register Empty
11
$00A
UART, TX
UART, Tx Complete
12
$00B
ADC
ADC Conversion Complete
13
$00C
EE_RDY
EEPROM Ready
14
$00D
ANA_COMP
Analog Comparator
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