參數(shù)資料
型號: AS3543-ECTP
廠商: ams
文件頁數(shù): 20/92頁
文件大小: 0K
描述: IC CODEC AUDIO FRONT END 68CTBGA
標準包裝: 4,000
類型: 音頻編解碼器
應用: 便攜式音頻,電話
安裝類型: 表面貼裝
封裝/外殼: 68-TFBGA
供應商設備封裝: 68-CTBGA(6x6)
包裝: 帶卷 (TR)
www.austriamicrosystems.com
Revision 1.11
26 - 91
AS3543 3v2
Data Sheet - D e t a i l e d D e s c r i p t i o n - A u d i o F u n c t i o n s
8.5.7
Register Description
DAC and ADC have to be enabled in register 14h first before other settings in register 0Eh to 11h can be programmed.
8.6
Audio Output Mixer
8.6.1
General
The mixer stage sums up the audio signals of the following stages
Microphone Input 1
Line Input 1/2
DAC Output
ADC Input
The mixing ratios have to be set within the volume registers of the corresponding input stages. Please be sure that the
peak voltage of input signals for the mixer stage is less than AVDD17/3. If summing up several signals, each individual
signal has of course to be accordingly lower. This shall insure that the output signal is also not higher than AVDD17/3
peak to get a proper signal for the output amplifier.
This stage features an automatic gain control (AGC), which automatically avoids clipping.
8.6.2
Register Description
Table 16. Audio Converter Related Register
Name
Base
Offset
Description
2-wire serial
0Eh
DAC input volume settings
2-wire serial
0Fh
DAC input volume settings
2-wire serial
10h
ADC output volume settings, source multiplexer settings
2-wire serial
11h
ADC output volume settings, sampling rate settings
2-wire serial
11h
DAC input digital volume settings
2-wire serial
14h
Enable/disable DAC, DAC gain stage & ADC
2-wire serial
16h
Enable/disable mixer input
2-wire serial
1A-3h
Control of SDO signal and drive
2-wire serial
1A-7h
PLL sample rate settings
2-wire serial
1Ch
Enables writings to extended registers 1Ah-3 and 1Ah-7
2-wire serial
25h
Interrupt settings for LRCK changes
Table 17. Audio Mixer Related Register
Name
Base
Offset
Description
2-wire serial
15h
Enable/disable mixer stage and AGC
2-wire serial
16h
Enable/disable DAC, MIC or Line Inputs to mixer stage
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