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| 型號： | AM49LV128BML11NT |
| 廠商： | SPANSION LLC |
| 元件分類： | 存儲器 |
| 英文描述： | 128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit) |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA64 |
| 封裝： | 12 X 9 MM, FBGA-64 |
| 文件頁數(shù)： | 14/98頁 |
| 文件大?。?/td> | 1016K |
| 代理商： | AM49LV128BML11NT |
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12
Am49LV128BM
June 17, 2004
RESET#: Hardware Reset Pin
The RESET# pin provides a hardware method of re-
setting the device to reading array data. When the RE-
SET# pin is driven low for at least a period of t
RP
, the
device immediately terminates any operation in
progress, tristates all output pins, and ignores all read/
write commands for the duration of the RESET# pulse.
The device also resets the internal state machine to
reading array data. The operation that was interrupted
should be reinitiated once the device is ready to ac-
cept another command sequence, to ensure data in-
tegrity.
Current is reduced for the duration of the RESET#
pulse. When RESET# is held at V
SS
±0.3 V, the device
draws CMOS standby current (I
CC4
). If RESET# is
held at V
IL
but not within V
SS
±0.3 V, the standby cur-
rent will be greater.
The RESET# pin may be tied to the system reset cir-
cuitry. A system reset would thus also reset the Flash
memory, enabling the system to read the boot-up firm-
ware from the Flash memory.
Refer to the AC Characteristics tables for RESET# pa-
rameters and to Figure 16 for the timing diagram.
V
CC
Power-up and Power-down Sequencing
The device imposes no restrictions on V
CC
power-up
or power-down sequencing. Asserting RESET# to VIL
is required during the entire V
CC
power sequence until
the respective supplies reach their operating voltages.
Once V
CC
attains its operating voltage, de-assertion of
RESET# to V
IH
is permitted.
Output Disable Mode
When the OE# input is at V
IH
, output from the device
is disabled. The output pins are placed in the high
impedance state.
Table 2.
Sector Address Table
Sector
A22–A15
Sector Size
(Kwords)
16-bit
Address Range
(in hexadecimal)
SA0
0
0
0
0
0
0
0
0
32
000000–007FFF
SA1
0
0
0
0
0
0
0
1
32
008000–00FFFF
SA2
0
0
0
0
0
0
1
0
32
010000–017FFF
SA3
0
0
0
0
0
0
1
1
32
018000–01FFFF
SA4
0
0
0
0
0
1
0
0
32
020000–027FFF
SA5
0
0
0
0
0
1
0
1
32
028000–02FFFF
SA6
0
0
0
0
0
1
1
0
32
030000–037FFF
SA7
0
0
0
0
0
1
1
1
32
038000–03FFFF
SA8
0
0
0
0
1
0
0
0
32
040000–047FFF
SA9
0
0
0
0
1
0
0
1
32
048000–04FFFF
SA10
0
0
0
0
1
0
1
0
32
050000–057FFF
SA11
0
0
0
0
1
0
1
1
32
058000–05FFFF
SA12
0
0
0
0
1
1
0
0
32
060000–067FFF
SA13
0
0
0
0
1
1
0
1
32
068000–06FFFF
SA14
0
0
0
0
1
1
1
0
32
070000–077FFF
SA15
0
0
0
0
1
1
1
1
32
078000–07FFFF
SA16
0
0
0
1
0
0
0
0
32
080000–087FFF
SA17
0
0
0
1
0
0
0
1
32
088000–08FFFF
SA18
0
0
0
1
0
0
1
0
32
090000–097FFF
SA19
0
0
0
1
0
0
1
1
32
098000–09FFFF
SA20
0
0
0
1
0
1
0
0
32
0A0000–0A7FFF
SA21
0
0
0
1
0
1
0
1
32
0A8000–0AFFFF
SA22
0
0
0
1
0
1
1
0
32
0B0000–0B7FFF
SA23
0
0
0
1
0
1
1
1
32
0B8000–0BFFFF
SA24
0
0
0
1
1
0
0
0
32
0C0000–0C7FFF
SA25
0
0
0
1
1
0
0
1
32
0C8000–0CFFFF
SA26
0
0
0
1
1
0
1
0
32
0D0000–0D7FFF
SA27
0
0
0
1
1
0
1
1
32
0D8000–0DFFFF
SA28
0
0
0
1
1
1
0
0
32
0E0000–0E7FFF
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM49LV128BML15NS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit) |
| AM49LV128BML15NT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:128 Megabit (8 M x 16-Bit) MirrorBit⑩ Uniform Sector Flash Memory and 32 Mbit (2 M x 16-Bit) |
| AM49LV4608M | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 64 Mbit (4 M x 16 bit) Flash Memory and 8 Mbit (512K x 16-Bit) pseudo Static RAM |
| AM49LV4608MB10IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 64 Mbit (4 M x 16 bit) Flash Memory and 8 Mbit (512K x 16-Bit) pseudo Static RAM |
| AM49LV4608MB10IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 64 Mbit (4 M x 16 bit) Flash Memory and 8 Mbit (512K x 16-Bit) pseudo Static RAM |
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