參數(shù)資料
型號(hào)： AFE7222IRGCR
廠商： Texas Instruments
文件頁(yè)數(shù)： 18/106頁(yè)
文件大?。?/td> 0K
描述： IC AFE 12BIT 65/130MSPS 64VQFN
標(biāo)準(zhǔn)包裝： 2,000
位數(shù)： 12
通道數(shù)： 4
功率（瓦特）： 610mW
電壓 - 電源，模擬： 2.85 V ~ 3.6 V
電壓 - 電源，數(shù)字： 1.7 V ~ 1.9 V
封裝/外殼： 64-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 64-VQFN 裸露焊盤（9x9）
包裝： 帶卷 (TR)
REGISTER ADDRESS
(A11:A0)
SDATA
SCLK
SEN
REGISTER DATA
(D7:D0)
SLOS711B – NOVEMBER 2011 – REVISED MARCH 2012
4
SERIAL PERIPHERAL INTERFACE
4.1
DESCRIPTION
The SPI (serial peripheral interface) is used to program the AFE7225/7222. It is used to read data from
and write data to the registers, from the rms/peak power meter and the auxiliary ADC. It is also used to
send data to the auxiliary DACs.
The interface is formed with pins SEN (Serial Interface Enable), SCLK (Serial Interface Clock), SDATA
(Serial interface input data) and SDOUT (Serial interface output data).
The serial shift of bits into the device is enabled when SEN is low. Serial data SDATA is latched at every
rising edge of SCLK when SEN is active (low). The SPI uses a 20-bit serial arrangement – the first 12-bits
are the register address, and the last 8-bits represent the data for the address.
The interface can work with SCLK frequency from a frequency of 40MHz down to a few Hertz and also
with non-50% SCLK duty cycle.
Direct access modes exist for reading from the auxiliary ADC and writing to the auxiliary DACs by using
the SPI pins.
Figure 4-1. Timing
Address bits (A11:A8) are referred to as the Page address of the register, and address bits (A7:A0) are
referred to as the Row address of the register.
4.2
SPI REGISTER READOUT
Data stored in a register corresponding to a page can be read out by programming the readout bit
corresponding to that page. The read out bit for a register addressed by (A11:A0) is the D0 bit of the
register with the Page address of (A11:A8) and row address of 00000000.
To read out a particular register, the following steps have to be followed:
1. Configure SDOUT as a digital output pin using bits
2. Set the register specific readout bit. This bit can be set by writing the following 20-bit sequence –
A11:A8,00000000,00000001 where (A11..A8) is the page address of the register whose contents are
desired to be read out
3. Once in the readout mode, write the address of the register to be readout as below. The new data
write is ignored. The data contents of the register come out serially on the SDOUT pin (with MSB first
format) as shown below.
Copyright 2011–2012, Texas Instruments Incorporated
SERIAL PERIPHERAL INTERFACE
19
Product Folder Link(s): AFE7222 AFE7225
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