ADV7183B
Rev. B | Page 73 of 100
Bits
Subaddress
Register
Bit Description
7
6
5
4
3
2
1
0
Comments
Notes
0
Disable.
AD_PAL_EN. PAL B/G/I/H autodetect
enable.
1Enable.
0
Disable.
AD_NTSC_EN. NTSC autodetect
enable.
1
Enable.
0
Disable.
AD_PALM_EN. PAL M autodetect
enable.
1
Enable.
0
Disable.
AD_PALN_EN. PAL N autodetect
enable.
1
Enable.
0
Disable.
AD_P60_EN. PAL60 autodetect
enable.
1
Enable.
0
Disable.
AD_N443_EN. NTSC443 autodetect
enable.
1
Enable.
0
Disable.
AD_SECAM_EN. SECAM autodetect
enable.
1
Enable
0
Disable.
0x07
Autodetect
Enable
AD_SEC525_EN. SECAM 525
autodetect enable.
1
Enable.
0x08
Contrast
Register
CON[7:0]. Contrast adjust. This is the
user control for contrast adjustment.
1
0
Luma gain = 1.
0x00 Gain = 0;
0x80 Gain = 1;
0xFF Gain = 2.
0x09
Reserved
1
0
0x0A
Brightness
Register
BRI[7:0]. This register controls the
brightness of the video signal.
0
0x00 = 0IRE;
0x7F = +100IRE;
0x80 = –100IRE.
0x0B
Hue
Register
HUE[7:0]. This register contains the
value for the color hue adjustment.
0
Hue range =
–90° to +90°.
0x0C
Default
Value Y
0
Free-run mode
dependent on
DEF_VAL_AUTO_EN.
DEF_VAL_EN. Default value enable.
1
Force free-run mode on
and output blue screen.
0
Disable free-run mode.
DEF_VAL_AUTO_EN. Default value.
1
Enable automatic free-
run mode (blue screen).
When lock is lost, free-
run mode can be
enabled to output
stable timing, clock,
and a set color.
0
1
0
1
DEF_Y[5:0]. Default value Y. This
register holds the Y default value.
Y[7:0] = {DEF_Y[5:0], 0, 0}.
Default Y value output
in free-run mode.
0x0D
Default
Value C
0
1
0
DEF_C[7:0]. Default value C. The Cr
and Cb default values are defined in
this register.
Cr[7:0] = DEF_C[7:4], 0, 0,
0, 0};
Cb[7:0] = DEF_C[3:0], 0, 0,
0, 0}.
Default Cb/Cr value
output in free-run
mode. Default values
give blue screen
output.
0x0E
ADI
Control
Reserved.
0
0Set as default.
0
Access user reg map.
SUB_USR_EN. Enables the user to
access the interrupt map.
1
Access interrupt reg map.
See
267H
Figure 38.
Reserved.
0
Set as default.
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