ADV7183B
Rev. B | Page 71 of 100
The following registers are located in the Common I2C Map and Register Access Page 1.
Table 86. Interrupt Register Map Details
Bits
Subaddress
Register
Bit Description
7
6
5
4
3
2
1
0
Comments
Notes
0
0CVBS in on AIN1.
0
1
CVBS in on AIN2.
0
1
0
CVBS in on AIN3.
0
1
CVBS in on AIN4.
0
1
0
CVBS in on AIN5.
0
1
0
1
CVBS in on AIN6.
Composite.
0
1
0
Y on AIN1, C on AIN4.
0
1
Y on AIN2, C on AIN5.
1
0
Y on AIN3, C on AIN6.
S-Video
1
0
1
Y on AIN1, Pr on AIN4,
Pb on AIN5.
1
0
1
0
Y on AIN2, Pr on AIN3,
Pb on AIN6.
YPbPr
1
0
1
CVBS in on AIN7.
1
0
CVBS in on AIN8.
1
0
1
CVBS in on AIN9.
1
0
CVBS in on AIN10.
INSEL[3:0]. The INSEL bits allow the
user to select an input channel as
well as the input format.
1
CVBS in on AIN11.
Composite
0
Auto-detect PAL
(B/G/H/I/D), NTSC
(without pedestal),
SECAM.
0
1
Auto-detect PAL
(B/G/H/I/D), NTSC-M (with
pedestal), SECAM.
0
1
0
Auto-detect PAL-N,
NTSC-M (without
pedestal), SECAM.
0
1
Auto-detect PAL-N,
NTSC-M (with pedestal),
SECAM.
0
1
0
NTSC-J.
0
1
0
1
NTSC-M.
0
1
0
PAL60.
0
1
NTSC-4.43.
1
0
PAL-B/G/H/I/D.
1
0
1
PAL-N (B/G/H/I/D without
pedestal).
1
0
1
0
PAL-M (without pedestal).
1
0
1
PAL-M.
1
0
PAL Combination N.
1
0
1
PAL Combination N.
1
0
SECAM (with pedestal).
0x00
Input
Control
VID_SEL[3:0]. The VID_SEL bits allow
the user to select the input video
standard.
1
SECAM (with pedestal).