參數(shù)資料
型號(hào)： ADV7183BBSTZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 33/100頁(yè)
文件大?。?/td> 0K
描述： IC VIDEO DECODER NTSC 80-LQFP
產(chǎn)品培訓(xùn)模塊： Interfacing AV Converters to Blackfin Processors
標(biāo)準(zhǔn)包裝： 1
類型： 視頻解碼器
應(yīng)用： 投影儀，錄音機(jī)，安全
電壓 - 電源，模擬： 3.15 V ~ 3.45 V
電壓 - 電源，數(shù)字： 1.65 V ~ 2 V
安裝類型： 表面貼裝
封裝/外殼： 80-LQFP
供應(yīng)商設(shè)備封裝： 80-LQFP（14x14）
包裝： 托盤
產(chǎn)品目錄頁(yè)面： 788 (CN2011-ZH PDF)
ADV7183B
Rev. B | Page 38 of 100
BL_C_VBI Blank Chroma During VBI, Address 0x04[2]
Setting BL_C_VBI high, the Cr and Cb values of all VBI lines
are blanked. This is done so any data that arrives during VBI is
not decoded as color and output through Cr and Cb. As a result,
it should be possible to send VBI lines into the decoder, then
output them through an encoder again, undistorted. Without
this blanking, any wrongly decoded color is encoded by the
video encoder; therefore, the VBI lines are distorted.
Setting BL_C_VBI to 0 decodes and outputs color during VBI.
Setting BL_C_VBI to 1 (default) blanks Cr and Cb values
during VBI.
RANGE Range Selection, Address 0x04[0]
AV codes (as per ITU-R BT-656, formerly known as CCIR-656)
consist of a fixed header made up of 0xFF and 0x00 values.
These two values are reserved and therefore cannot be used for
active video. Additionally, the ITU specifies that the nominal
range for video should be restricted to values between 16 and
235 for luma and 16 to 240 for chroma.
The RANGE bit allows the user to limit the range of values
output by the ADV7183B to the recommended value range. In
any case, it ensures that the reserved values of 255d (0xFF) and
00d (0x00) are not presented on the output pins unless they are
part of an AV code header.
Table 52. RANGE Function
RANGE
Description
0
16 ≤ Y ≤ 235
16 ≤ C/P ≤ 240
1 (default)
1 ≤ Y ≤ 254
1 ≤ C/P ≤ 254
AUTO_PDC_EN Automatic Programmed Delay Control,
Address 0x27[6]
Enabling the AUTO_PDC_EN function activates a function
within the ADV7183B that automatically programs the
LTA[1:0] and CTA[2:0] to have the chroma and luma data
match delays for all modes of operation. If set, manual registers
LTA[1:0] and CTA[2:0] are not used. If the automatic mode
is disabled (via setting the AUTO_PDC_EN bit to 0), the
values programmed into LTA[1:0] and CTA[2:0] registers
become active.
When AUTO_PDC_EN is 0, the ADV7183 uses the LTA[1:0]
and CTA[2:0] values for delaying luma and chroma samples.
Refer to the
203H
LTA[1:0] Luma Timing Adjust, Address 0x27[1:0]
and the
204H
CTA[2:0] Chroma Timing Adjust, Address 0x27[5:3]
sections.
When AUTO_PDC_EN is 1 (default), the ADV7183B auto-
matically determines the LTA and CTA values to have luma
and chroma aligned at the output.
LTA[1:0] Luma Timing Adjust, Address 0x27[1:0]
The Luma Timing Adjust register allows the user to specify a
timing difference between chroma and luma samples.
There is a certain functionality overlap with the CTA[2:0]
register. For manual programming, use the following defaults:
CVBS input LTA[1:0] = 00
Y/C input LTA[1:0] = 01
YPrPb input LTA[1:0] = 01
Table 53. LTA Function
LTA[1:0]
Description
00 (default)
No delay
01
Luma 1 clk (37 ns) delayed
10
Luma 2 clk (74 ns) early
11
Luma 1 clk (37 ns) early
CTA[2:0] Chroma Timing Adjust, Address 0x27[5:3]
The Chroma Timing Adjust register allows the user to specify a
timing difference between chroma and luma samples. This can
be used to compensate for external filter group delay differences
in the luma vs. chroma path, and to allow a different number of
pipeline delays while processing the video downstream. Review
this functionality together with the LTA[1:0] register.
The chroma can only be delayed/advanced in chroma pixel
steps. One chroma pixel step is equal to two luma pixels. The
programmable delay occurs after demodulation, where one
can no longer delay by luma pixel steps.
For manual programming, use the following defaults:
CVBS input CTA[2:0] = 011
Y/C input CTA[2:0] = 101
YPrPb input CTA[2:0] =110
Table 54. CTA Function
CTA[2:0]
Description
000
Not used
001
Chroma + 2 chroma pixel (early)
010
Chroma + 1 chroma pixel (early)
011 (default)
No delay
100
Chroma – 1 chroma pixel (late)
101
Chroma – 2 chroma pixel (late)
110
Chroma – 3 chroma pixel (late)
111
Not used
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7183BKST 制造商:Analog Devices 功能描述:MULTIFORMAT SDTV VID DECODER 80LQFP - Bulk
ADV7183BKSTZ 功能描述:IC VIDEO DECODER NTSC 80-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV7183KST 制造商:Analog Devices 功能描述:Video Decoder 2ADC 10-Bit 80-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:VIDEO DECODER I.C. - Bulk
ADV7184 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder with Fast Switch Overlay Support
ADV7184BSTZ 功能描述:IC DECODER VID SDTV MULTI 80LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
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