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| 型號(hào)： | ADV7180 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 10-Bit, 4 x Oversampling SDTV Video Decoder |
| 中文描述： | 10位，4個(gè)采樣標(biāo)清視頻解碼器 |
| 文件頁(yè)數(shù)： | 32/112頁(yè) |
| 文件大?。?/td> | 1320K |
| 代理商： | ADV7180 |
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ADV7180
CSFM[2:0], C Shaping Filter Mode, Address 0x17 [7:5]
The C shaping filter mode bits allow the user to select from a
range of low-pass filters for the chrominance signal. When
switched in automatic mode, the widest filter is selected based
on the video standard/format and user choice (see Settings 000
and 001 in Table 33).
Rev. A | Page 32 of 112
Table 33. CSFM Function
CSFM[2:0]
000 (default)
001
010
011
100
101
110
111
Description
Autoselect 1.5 MHz bandwidth
Autoselect 2.17 MHz bandwidth
SH1
SH2
SH3
SH4
SH5
Wideband mode
Figure 23 shows the responses of SH1 (narrowest) to SH5
(widest) in addition to the wideband mode (shown in red).
GAIN OPERATION
The gain control within the ADV7180 is done on a purely
digital basis. The input ADC supports a 10-bit range mapped
into a 1.0 V analog voltage range. Gain correction takes place
after the digitization in the form of a digital multiplier.
Advantages of this architecture over the commonly used
programmable gain amplifier (PGA) before the ADC include
the fact that the gain is now completely independent of supply,
temperature, and process variations.
As shown in Figure 25, the ADV7180 can decode a video signal
as long as it fits into the ADC window. The components to this
are the amplitude of the input signal and the dc level it resides
on. The dc level is set by the clamping circuitry (see the Clamp
Operation section).
If the amplitude of the analog video signal is too high, clipping
may occur, resulting in visual artifacts. The analog input range
of the ADC, together with the clamp level, determines the
maximum supported amplitude of the video signal.
Figure 24 shows a typical voltage divider network that is
required to keep the input video signal within the allowed range
of the ADC, 0 V to 1 V. This circuit should be placed before all
analog inputs to the ADV7180.
39
36
100nF
ANALOG VIDEO
INPUT
AIN_OF_ADV7180
0
Figure 24. Input Voltage Divider Network
The minimum supported amplitude of the input video is
determined by the ability of the ADV7180 to retrieve horizontal
and vertical timing and to lock to the color burst, if present.
There are separate gain control units for luma and chroma data.
Both can operate independently of each other. The chroma unit,
however, can also take its gain value from the luma path.
The possible AGC modes are shown in Table 34.
Table 34. AGC Modes
Input
Video Type
Any
CVBS
Luma Gain
Manual gain luma
Dependent on
horizontal sync depth
Chroma Gain
Manual gain chroma
Dependent on color-
burst amplitude
taken from luma path
Dependent on color-
burst amplitude
taken from luma path
Dependent on color-
burst amplitude
taken from luma path
Dependent on color-
burst amplitude
Taken from luma path
Peak white
Dependent on
horizontal sync depth
Y/C
Peak white
YPrPb
Dependent on
horizontal sync depth
It is possible to freeze the automatic gain control loops. This
causes the loops to stop updating and the AGC determined gain
at the time of the freeze to stay active until the loop is either
unfrozen or the gain mode of operation is changed.
The currently active gain from any of the modes can be read
back. Refer to the description of the dual-function manual gain
registers, LG[11:0] luma gain and CG[11:0] chroma gain, in the
Luma Gain and Chroma Gain sections.
ANALOG VOLTAGE
RANGE SUPPORTED BY ADC (1V RANGE FOR ADV7180)
DATA PRE-
PROCESSOR
(DPP)
ADC
VIDEO PROCESSOR
(GAIN SELECTION ONLY)
MAXIMUM
VOLTAGE
MINIMUM
VOLTAGE
CLAMP
LEVEL
GAIN
CONTROL
0
Figure 25. Gain Control Overview
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7180BCPZ | 10-Bit, 4 x Oversampling SDTV Video Decoder |
| ADV7180BSTZ | 10-Bit, 4 x Oversampling SDTV Video Decoder |
| ADV7181 | Multiformat SDTV Video Decoder |
| ADV7181B | Multiformat SDTV Video Decoder |
| ADV7181BBCPZ | Multiformat SDTV Video Decoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7180_12 | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 4?? Oversampling SDTV Video Decoder |
| ADV7180BCP32Z | 制造商:Analog Devices 功能描述:10-BIT, 4? OVERSAMPLING SDTV VIDEO DECODER - Trays |
| ADV7180BCP32Z-RL | 制造商:Analog Devices 功能描述:IC |
| ADV7180BCPZ | 功能描述:IC VIDEO DECODER SDTV 40-LFCSP RoHS:是 類(lèi)別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類(lèi)型:電平移位器 應(yīng)用:LCD 電視機(jī)/監(jiān)控器 安裝類(lèi)型:表面貼裝 封裝/外殼:28-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:28-WQFN（4x4）裸露焊盤(pán) 包裝:帶卷 (TR) 其它名稱:296-32523-2TPS65198RUYT-ND |
| ADV7180BCPZ | 制造商:Analog Devices 功能描述:IC VIDEO DECODER 10BIT 57.27MSPS LFCSP40 |
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