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參數(shù)資料
| 型號(hào)： | ADUC7036CCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 82/132頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 96K FLASH DUAL 48LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MicroConverter® ADuC7xxx |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 20.48MHz |
| 連通性： | LIN，SPI，UART/USART |
| 外圍設(shè)備： | PSM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 9 |
| 程序存儲(chǔ)器容量： | 96KB（48K x 16） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 1.5K x 32 |
| 電壓 - 電源 (Vcc/Vdd)： | 3.5 V ~ 18 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 2x16b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 115°C |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 包裝： | 托盤 |
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ADuC7036
Rev. C | Page 53 of 132
Current Channel ADC Data Register
Name: ADC0DAT
Address: 0xFFFF0520
Default Value: 0x0000
Access: Read only
Function: This ADC data MMR holds the 16-bit conversion
result from the I-ADC. The ADC does not update this MMR if
the ADC0 conversion result ready bit (ADCSTA[0]) is set. A
read of this MMR by the MCU clears all asserted ready flags
(ADCSTA[2:0]).
Voltage Channel ADC Data Register
Name: ADC1DAT
Address: 0xFFFF0524
Default Value: 0x0000
Access: Read only
Function: This ADC data MMR holds the 16-bit voltage
conversion result from the V-/T-ADC. The ADC does not
update this MMR if the voltage conversion result ready bit
(ADCSTA[1]) is set. If I-ADC is not active, a read of this MMR
by the MCU clears all asserted ready flags (ADCSTA[2:1]).
Temperature Channel ADC Data Register
Name: ADC2DAT
Address: 0xFFFF0528
Default Value: 0x0000
Access: Read only
Function: This ADC data MMR holds the 16-bit temperature
conversion result from the V-/T-ADC. The ADC does not
update this MMR if the temperature conversion result ready bit
(ADCSTA[2]) is set. If I-ADC and V-ADC are not active, a read
of this MMR by the MCU clears all asserted ready flags
(ADCSTA[2]). A read of this MMR clears ADCSTA[2].
Current Channel ADC Offset Calibration Register
Name: ADC0OF
Address: 0xFFFF0530
Default Value: Part specific, factory programmed
Access: Read/write
Function: This ADC offset MMR holds a 16-bit offset calibration
coefficient for the I-ADC. The register is configured at power-
on with a factory default value. However, this register automati-
cally overwrites if an offset calibration of the I-ADC is initiated
by the user via bits in the ADCMDE MMR. User code can write
to this calibration register only if the ADC is in idle mode. An
ADC must be enabled and in idle mode before being written to
any offset or gain register. The ADC must be in idle mode for at
least 23 μs.
Voltage Channel ADC Offset Calibration Register
Name: ADC1OF
Address: 0xFFFF0534
Default Value: Part specific, factory programmed
Access: Read/write
Function: This offset MMR holds a 16-bit offset calibration
coefficient for the voltage channel. The register is configured at
power-on with a factory default value. However, this register is
automatically overwritten if an offset calibration of the voltage
channel is initiated by the user via bits in the ADCMDE MMR.
User code can write to this calibration register only if the ADC
is in idle mode. An ADC must be enabled and in idle mode
before being written to any offset or gain register. The ADC
must be in idle mode for at least 23 μs.
Temperature Channel ADC Offset Calibration Register
Name: ADC2OF
Address: 0xFFFF0538
Default Value: Part specific, factory programmed
Access: Read/write
Function: This ADC offset MMR holds a 16-bit offset
calibration coefficient for the temperature channel. The register
is configured at power-on with a factory default value. However,
this register is automatically overwritten if an offset calibration
of the temperature channel is initiated by the user via bits in the
ADCMDE MMR. User code can write to this calibration register
only if the ADC is in idle mode. An ADC must be enabled and
in idle mode before being written to any offset or gain register.
The ADC must be in idle mode for at least 23 μs.
Current Channel ADC Gain Calibration Register
Name: ADC0GN
Address: 0xFFFF053C
Default Value: Part specific, factory programmed
Access: Read/write
Function: This gain MMR holds a 16-bit gain calibration
coefficient for scaling the I-ADC conversion result. The register
is configured at power-on with a factory default value. However,
this register is automatically overwritten if a gain calibration of
the I-ADC is initiated by the user via bits in the ADCMDE
MMR. User code can write to this calibration register only if the
ADC is in idle mode. An ADC must be enabled and in idle
mode before being written to any offset or gain register. The
ADC must be in idle mode for at least 23 μs.
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