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參數(shù)資料
| 型號(hào)： | ADS62C17IRGCR |
| 廠商： | Texas Instruments |
| 文件頁(yè)數(shù)： | 1/68頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 11BIT SRL/PAR 200M 64VQFN |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 11 |
| 采樣率（每秒）： | 200M |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 1.1W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 64-VQFN 裸露焊盤(pán)（9x9） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個(gè)差分，單極 |
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FEATURES
DESCRIPTION
www.ti.com ............................................................................................................................................................. SLAS631A – APRIL 2009 – REVISED JULY 2009
Dual Channel 11 Bit, 200 MSPS ADC With SNRBoost
Programmable Gain up to 6dB for SNR/SFDR
Trade-off
Maximum Sample Rate: 200 MSPS
DC Offset Correction
11-bit Resolution with No Missing Codes
Gain Tuning Capability in Fine Steps (0.001
90 dBc SFDR at Fin = 10 MHz
dB) Allows Channel-to-channel Gain Matching
79.8 dBFS SNR at 125 MHz IF, 20 MHz BW
Supports Input Clock Amplitude Down to 400
using TI proprietary SNRBoost technology
mV p-p Differential
Total Power 1.1 W at 200 MSPS
Internal and External Reference Support
90 dB Cross-talk
64-QFN Package (9 mm × 9 mm)
Double Data Rate (DDR) LVDS and Parallel
CMOS Output Options
ADS62C17 is a dual channel 11-bit, 200 MSPS A/D converter that combines high dynamic performance and low
power consumption in a compact 64 QFN package. This makes it well-suited for multi-carrier, wide band-width
communications applications.
ADS62C17 uses TI-proprietary SNRBoost technology that can be used to overcome SNR limitation due to
quantization noise for bandwidths less than Nyquist (Fs/2). It includes several useful and commonly used digital
functions such as ADC offset correction, gain (0 to 6 dB in steps of 0.5 dB) and gain tuning (in fine steps of 0.001
dB).
The gain option can be used to improve SFDR performance at lower full-scale input ranges. Using the gain
tuning capability, each channel’s gain can be set independently to improve channel-to-channel gain matching.
The device also includes a dc offset correction loop that can be used to cancel the ADC offset.
Both DDR LVDS (Double Data Rate) and parallel CMOS digital output interfaces are available. It includes
internal references while the traditional reference pins and associated decoupling capacitors have been
eliminated. Nevertheless, the device can also be driven with an external reference.
The device is specified over the industrial temperature range (–40°C to 85°C).
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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| ADS62C17IRGCT | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual Channel 11B 200MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS62P15 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual Channel 11-Bits, 125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs |
| ADS62P15_09 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual Channel 11-Bits,125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs |
| ADS62P15_1 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual Channel 11-Bits,125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs |
| ADS62P15EVM | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開(kāi)發(fā)工具 ADS62P15 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
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