參數(shù)資料
型號(hào)： ADE7758ARW
廠商： ANALOG DEVICES INC
元件分類： 模擬信號(hào)調(diào)理
英文描述： Poly Phase Multifunction Energy Metering IC with Per Phase Information
中文描述： SPECIALTY ANALOG CIRCUIT, PDSO24
封裝： MS-013-AD, SOIC-24
文件頁數(shù)： 62/68頁
文件大小： 1584K
代理商： ADE7758ARW
ADE7758
MEASUREMENT MODE REGISTER (0x14)
The configuration of the PERIOD and peak measurements made by the ADE7758 is defined by writing to the MMODE register.
Table 15 summarizes the functionality of each bit in the MMODE register.
Table 15. MMODE Register
Bit
Location
Mnemonic
Value
Description
0 to 1
FREQSEL
0
These bits are used to select the source of the measurement of the voltage line frequency.
FREQSEL1
0
0
1
1
2 to 4
PEAKSEL
7
These bits select the phases used for the voltage and current peak registers. Setting Bit 2 switches the
IPEAK and VPEAK registers to hold the absolute values of the largest current and voltage waveform
(over a fixed number of half-line cycles) from Phase A. The number of half-line cycles is determined by
the content of the LINECYC register. At the end of the LINECYC number of half-line cycles, the content
of the registers is replaced with the new peak values. Similarly, setting Bit 3 turns on the peak
detection for Phase B and Bit 4 is for Phase C. Note that if more than one bit is set, the VPEAK and
IPEAK registers can hold values from two different phases, i.e., the voltage and current peak are
independently processed (see the Peak Current Detection section).
5 to 7
PKIRQSEL
7
These bits select the phases used for the peak interrupt detection. Setting Bit 5 switches on the
monitoring of the absolute current and voltage waveform to Phase A. Similarly, setting Bit 6 turns on
the waveform detection for Phase B and Bit 7 is for Phase C. Note that more than one bit can be set for
detection on multiple phases. If the absolute values of the voltage or current waveform samples in
the selected phases exceeds the preset level specified in the PKVLVL or PKILVL registers, the
corresponding bit(s) in the STATUS registers are set (see the Peak Current Detection section).
WAVEFORM MODE REGISTER (0x15)
The waveform sampling mode of the ADE7758 is defined by writing to the WAVMODE register. Table 16 summarizes the functionality of
each bit in the WAVMODE register.
Table 16. WAVMODE Register
Bit
Location
Mnemonic
Value
Description
0 to 1
PHSEL
0
These bits are used to select the phase of the waveform sample.
PHSEL[1:0]
0
0
0
1
1
0
1
1
2 to 4
WAVSEL
0
These bits are used to select the type of waveform.
WAVSEL[2:0]
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
-Others-
5 to 6
DTRT
0
These bits are used to select the data rate.
DTRT[1:0]
0
0
0
1
1
0
1
1
7
VACF
0
Setting this bit to Logic 1 switches the VARCF output pin to an output frequency that is
proportional to the total apparent power (VA). In the default state, Logic 0, the VARCF pin outputs
a frequency proportional to the total reactive power (VAR).
Rev. A | Page 62 of 68
Bit
Default
FREQSEL0
0
1
0
1
Source
Phase A
Phase B
Phase C
Reserved
Bit
Default
Source
Phase A
Phase B
Phase C
Reserved
Source
Current
Voltage
Active Power Multiplier Output
Reactive Power Multiplier Output
VA Multiplier Output
Reserved
Update Rate
26.0 kSPS (CLKIN/3/128)
13.0 kSPS (CLKIN/3/256)
6.5 kSPS (CLKIN/3/512)
3.3 kSPS (CLKIN/3/1024)
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ADE7758ARWZ 功能描述:IC ENERGY METERING 3PHASE 24SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測(cè)量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:*
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ADE7758ARWZRL 功能描述:IC ENERGY METERING 3PHASE 24SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 能量測(cè)量 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:*
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