參數(shù)資料
型號(hào)： ADE7758ARW
廠商： ANALOG DEVICES INC
元件分類： 模擬信號(hào)調(diào)理
英文描述： Poly Phase Multifunction Energy Metering IC with Per Phase Information
中文描述： SPECIALTY ANALOG CIRCUIT, PDSO24
封裝： MS-013-AD, SOIC-24
文件頁(yè)數(shù)： 25/68頁(yè)
文件大?。?/td> 1584K
代理商： ADE7758ARW
ADE7758
The phase calibration registers (APHCAL, BPHCAL, and
CPHCAL) are twos complement, 7-bit signed registers that can
vary the time advance/delay in the voltage channel signal path
from –151.2 μs to +75.6 μs (CLKIN = 10 MHz). One LSB is
equivalent to 1.2 μs of time delay or 2.4 μs of time advance.
With a line frequency of 50 Hz, this gives a phase resolution of
0.026° at the fundamental, i.e., 360° × 1.2 μs × 60 Hz, in the positive
direction and 0.052° in the negative direction. This corresponds to
a total correction range of 2.72° to +1.36° at 50 Hz.
Rev. A | Page 25 of 68
Figure 56 illustrates how the phase compensation is used to
remove a 0.1° phase lead in IA of the current channel from the
external current transducer. In order to cancel the lead (0.1°) in
the current channel of Phase A, a phase lead must be introduced
into the corresponding voltage channel. The resolution of the
phase adjustment allows the introduction of a phase lead of
0.104°. The phase lead is achieved by introducing a time advance
into VA. A time advance of 4.8 μs is made by writing 4 (0x3C)
to the time delay block (APHCAL[7:0]), thus reducing the
amount of time delay by 4.8 μs or equivalently, 360° × 4.8 μs ×
60 Hz = 0.104° at 60 Hz.
0
0
100
200
300
400
FREQUENCY (Hz)
500
600
700
800
1k
900
90
0
10
20
30
40
50
60
70
80
P
Figure 53. Phase Response of the HPF and Phase Compensation
(10 Hz to 1 kHz)
0
40
70
65
60
55
50
45
0.20
0.15
0.10
0.05
0
–0.05
–0.10
FREQUENCY (Hz)
P
Figure 54. Phase Response of the HPF and Phase Compensation
(40 Hz to 70 Hz)
0
44
56
54
52
50
48
46
0.10
0.08
0.06
0.04
0.02
0
–0.02
FREQUENCY (Hz)
P
Figure 55. Gain Response of HPF and Phase Compensation
(44 Hz to 56 Hz)
0
PGA1
IAP
IAN
IA
ADC
HPF
PGA2
VAP
VN
VA
ADC
60Hz
0.1°
V2
V1
RANGE OF PHASE
CALIBRATION
1 1 1 1 1 0 0
6
0
APHCAL[6:0]
–151.2
μ
s TO +75.6
μ
s
VA
VA DELAYED BY 4.8
μ
s
(–0.104
°
@ 60Hz)
0x7C
IA
60Hz
DIGITAL
INTEGRATOR
ACTIVE AND
REACTIVE
ENERGY
CALCULATION
+1.36°, –2.72° @ 50Hz; 0.022°, 0.043°
+1.63°, –3.28° @ 60Hz; 0.026°, 0.052°
Figure 56. Phase Calibration on Voltage Channels
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參數(shù)描述
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