參數(shù)資料
型號(hào)： ADE7753ARSRL
廠商： ANALOG DEVICES INC
元件分類： 模擬信號(hào)調(diào)理
英文描述： Active and Apparent Energy Metering IC with di/dt sensor interface
中文描述： SPECIALTY ANALOG CIRCUIT, PDSO20
封裝： MO-150AE, SSOP-20
文件頁(yè)數(shù)： 32/38頁(yè)
文件大?。?/td> 449K
代理商： ADE7753ARSRL
ADE7753
–32–
REV. PrF 10/02
PRELIMINARY TECHNICAL DATA
A D E 7753 R E GIST E R D E SC R IPT IONS
All AD E7753 functionality is accessed via the on-chip registers. Each register is accessed by first writing to the
communications register and then transferring the register data. A full description of the serial interface protocol is given in
the
Serial Interface
section of this data sheet.
C ommunications R egister
T he Communications register is an 8-bit, write-only register which controls the serial data transfer between the ADE7753
and the host processor. All data transfer operations must begin with a write to the communications register. T he data written
to the communications register determines whether the next operation is a read or a write and which register is being accessed.
T able IV below outlines the bit designations for the Communications register.
Table V. Communications Register
Bit
L ocation
Bit
Mnemonic
Description
0 to 5
A0 to A5
T he six L SBs of the Communications register specify the register for the data transfer
operation. T able III lists the address of each ADE7753 on-chip register.
T his bit is unused and should be set to zero.
When this bit is a logic one the data transfer operation immediately following the write to
the Communications register will be interpreted as a write to the ADE7753. When this bit
is a logic zero the data transfer operation immediately following the write to the
Communications register will be interpreted as a read operation.
6
7
R E SE R V E D
W /
R
DB0
A0
W/R
A4
A3
A2
A1
0
A5
DB1
DB2
DB3
DB4
DB5
DB6
DB7
A ddress
Name
R/W
# of Bits
Default
Description
21h
V PK L V L
R /W
8 bits
F F h
Channel 2 Peak Level threshold (voltage channel). T his register
sets the level of the voltage peak detection. If the channel 2 input
exceeds this level, the PK V flag in the status register is set.
Channel 1 peak register. T he maximum input value of the
Current channel since the last read of the register is stored in this
register.
Same as Channel 1 peak register except that the register contents
are reset to 0 after read.
Channel 2 peak register. T he maximum input value of the
Voltage channel since the last read of the register is stored in this
register.
Same as Channel 2 peak register except that the register contents
are reset to 0 after a read.
T emperature register. T his is an 8-bit register which contains the
result of the latest temperature conversion – see
Temperature
Measurement
.
Period of the channel 2 (volatge channel) input estimated by
Zero-crossing processing.
22h
IPE AK
R
24 bits
0h
23h
R ST IPE AK
R
24 bits
0h
24h
V PE AK
R
24 bits
0h
25h
R ST V PE AK
R
24 bits
0h
26h
T E M P
R
8 bits
0h
27h
PE R IOD
R
15 bits
0h
28h-
3C h
3D h
3E h
Reserved
T est mode register
Checksum Register. T his 6-bit read only register is equal to the
sum of all the ones in the previous read – see
ADE7753 Serial Read
Operation.
Die Revision Register. T his 8-bit read only register contains the
revision number of the silicon.
T M OD E
C H K SU M
R /W
R
8 bits
6 bits
-
0h
3F h
D IE R E V
R
8 bits
-
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ADE7753-ARSZRL 制造商:Analog Devices 功能描述:
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