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參數(shù)資料
| 型號(hào)： | ADAV803ASTZ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | 8-Channel 14-Bit Single-Supply Voltage-Output DAC; Package: LQFP (10x10mm); No of Pins: 52; Temperature Range: Industrial |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | ROHS COMPLIANT, MS-026BCD, LQFP-64 |
| 文件頁(yè)數(shù)： | 46/56頁(yè) |
| 文件大?。?/td> | 906K |
| 代理商： | ADAV803ASTZ-REEL |
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ADAV803
Table 58. DAC Control Register 2
ADDRESS = 1100101 (0x65)
DMCLK1–0
DFS1–0
D
Rev. 0 | Page 46 of 56
RES
7
RES
6
DMCLK1
5
DMCLK0
4
DFS1
3
DFS0
2
DEEM1
1
DEEM0
0
DAC MCLK divider.
00 = MCLK.
01 = MCLK/1.5.
10 = MCLK/2.
11 = MCLK/3.
DAC interpolator s
00 = 8 × (M
01
10 = 2 ×
11 = Reserved.
DAC de-emphasis s
00 = None.
01 = 44.1 kHz.
elect.
CLK
).
= 4 × (MCLK
(MCLK = 64 × f
S
).
128 × f
S
).
EEM1–0
elect.
10 = 32 kHz.
11 = 48 kHz.
= 256 × f
S
=
Table 59. DAC Contr
ADDRESS = 1100110 (0x66)
ZFVOL
ZFDATA
ZFPOL
Table 60. DAC Contr
ADDRESS = 1100111 (0x67)
INTRPT
ZEROSEL1–0
Register 3
ol
RES
7
RES
6
RES
5
RES
4
RES
3
ZFVOL
2
ZFDATA
1
ZFPOL
0
DAC zero flag on mute and zero volume.
0
1 = Disabled.
DAC zero flag on zero data
disable.
0 = Enabled.
1 = Disabled.
DAC zero f
= Active high.
= Active low.
lag polarity.
0
1
= Enabled.
RES
7
INTRPT
6
ZEROSEL1
5
ZEROSEL0
4
RES
3
RES
2
RES
1
RES
0
ol Register 4
This bit selects th
0 = Pin functions as a ZEROL flag pin.
1
T
00 = Pin functions as a ZEROR flag pin.
01 = Pin functions as a ZEROL flag pin.
1
1
1 = Pin is asserted when both the left and
unctionality
e f
the ZEROL/
pin.
of
INT
in.
lity of the ZEROR pin when the ZEROL/INT pin is used as an interrupt.
hen either the left or right channel is zero.
0 = Pin is asserted w
right channels are zero.
= Pin functions as an interrupt p
hese bits control the functiona
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