參數(shù)資料
型號(hào)： AD9865BCPZ1
廠商： Analog Devices, Inc.
英文描述： Broadband Modem Mixed-Signal Front End
中文描述： 寬帶調(diào)制解調(diào)器混合信號(hào)前端
文件頁數(shù)： 11/48頁
文件大?。?/td> 1672K
代理商： AD9865BCPZ1
AD9865
Pin No.
15
16
17, 64
18, 63
19
20
21
22
23
24
25 to 29
30
31, 34, 36, 39, 44, 47, 48
32, 33
35, 40, 43
37, 38
41
42
45
46
49
50
51
52
53
Rev. A | Page 11 of 48
Mnemonic
TXCLK
TXQUIET
RXCLK
DRVDD
DRVSS
CLKOUT1
SDIO
SDO
SCLK
SEN
GAIN
PGA[5]
PGA[4 to 0]
RESET
AVSS
REFB, REFT
AVDD
RX, RX+
REFADJ
REFIO
IOUT_G
IOUT_N
IOUT_G+
IOUT_N+
IOUT_P
IOUT_P+
MODE
Mode
1
HD
FD
HD
FD
FD
HD or FD
HD or FD
Description
ADIO Sample Clock Input
Fast TxDAC/IAMP Power-Down
ADIO Request Clock Input
Rx and Tx Clock Output at 2 x f
ADC
Digital Output Driver Supply Input
Digital Output Driver Supply Return
f
ADC
/N Clock Output (L = 1, 2, 4, or 8)
Serial Port Data Input/Output
Serial Port Data Output
Serial Port Clock Input
Serial Port Enable Input
Tx Data Port (Tx[5:0]) Mode Select
MSB of PGA Input Data Port
Bits 4 to 0 of PGA Input Data Port
Reset Input (Active Low)
Analog Ground
ADC Reference Decoupling Nodes
Analog Power Supply Input
Receive Path and + Analog Inputs
TxDAC Full-Scale Current Adjust
TxDAC Reference Input/Output
Tx Amp Current Output_Sink
Tx Mirror Current Output_Sink
+Tx Amp Current Output_Sink
+Tx Mirror Current Output_Sink
TxDAC Current Output_Source
+TxDAC Current Output_Source
Digital Interface Mode Select Input
LOW = HD, HIGH = FD
Power-Up SPI Register Default Setting Input
Clock Oscillator/Synthesizer Supply Return
Crystal Oscillator Inverter Output
Crystal Oscillator Inverter Input
Clock Oscillator/Synthesizer Supply
Digital Supply Return
Digital Supply Input
f
OSCIN
/L Clock Output, (L = 1, 2, or 4)
Power-Down Input
54
55
56
57
58
59
60
61
62
CONFIG
CLKVSS
XTAL
OSCIN
CLKVDD
DVSS
DVDD
CLKOUT2
PWR_DWN
1
HD = half-duplex mode; FD = full-duplex mode.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9865BCPZRL 功能描述:IC PROCESSOR FRONT END 64LFCSP RoHS:是 類別:RF/IF 和 RFID >> RF 前端 (LNA + PA) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- RF 型:GPS 頻率:1575.42MHz 特點(diǎn):- 封裝/外殼:48-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFP 裸露焊盤（7x7） 包裝:托盤
AD9865BCPZRL1 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End
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