參數(shù)資料
型號: AD9854AST
廠商: ANALOG DEVICES INC
元件分類: XO, clock
英文描述: CMOS 300 MHz Quadrature Complete-DDS
中文描述: PLL FREQUENCY SYNTHESIZER, 200 MHz, PQFP80
封裝: MS-026BEC, LQFP-80
文件頁數(shù): 34/44頁
文件大?。?/td> 433K
代理商: AD9854AST
AD9854
–34–
REV. 0
THERMALLY ENHANCED PACKAGE MOUNTING
GUIDELINES
The following are general recommendations for mounting the
thermally enhanced exposed heat sink package (AD9854ASQ)
to printed circuit boards. The exceptional thermal characteristics of
this package depend entirely upon proper mechanical attachment.
Figure 58 depicts the package from the bottom and shows the
dimensions of the exposed heat sink. A solid conduit of solder
needs to be established between this pad and the surface of
the PCB.
C
O
U
N
TR
Y
14mm
10mm
Figure 58.
Figure 59 depicts a general PCB land pattern for such an exposed
heat sink device. Note that this pattern is for a 64-lead device not
an 80-lead, but the relative shapes and dimensions still apply.
In this land pattern, a solid copper plane exists inside of the
individual lands for device leads. Note also that the solder mask
opening is conservatively dimensioned to avoid any assembly
problems.
SOLDER MASK
OPENING
THERMAL LAND
Figure 59.
The thermal land itself must be able to distribute heat to an even
larger copper plane such as an internal ground plane. Vias must be
uniformly provided over the entire thermal pad to connect to this
internal plane. A proposed via pattern is shown in Figure 60. Via
holes should be small (12 mils, 0.3 mm) such that they can be
plated and plugged. These will provide the mechanical conduit
for heat transfer.
Figure 60.
Finally, a proposed stencil design is depicted for screen solder
placement. Note that if vias are not plugged, wicking will occur
which will displace solder away from the exposed heat sink and
the necessary mechanical bond will not be established.
Figure 61.
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相關代理商/技術參數(shù)
參數(shù)描述
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