- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1987 > AD9558BCPZ-REEL7 (Analog Devices Inc)IC CLK XLATR PLL 1250MHZ 64LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD9558BCPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 100/104頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK XLATR PLL 1250MHZ 64LFCSP |
| 產(chǎn)品變化通告： | AD9558 Minor Metal Mask Change 17/Apr/2012 |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 類型： | 時(shí)鐘/頻率轉(zhuǎn)換器 |
| PLL： | 是 |
| 主要目的： | 以太網(wǎng)，SONET/SDH，Stratum |
| 輸入： | CMOS，LVDS，LVPECL |
| 輸出： | CMOS，HSTL，LVDS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 4:6 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 1.25GHz |
| 電源電壓： | 1.71 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁當(dāng)前第100頁第101頁第102頁第103頁第104頁
Data Sheet
AD9558
Rev. B | Page 95 of 104
Table 105. IRQ Monitor for the Digital PLL
Address
Bits
Bit Name
Description
0x0D04
7
Switching
Indicates that the DPLL is switching to a new reference
6
Closed
Indicates that the DPLL has entered closed-loop operation
5
Freerun
Indicates that the DPLL has entered free run mode
4
Holdover
Indicates that the DPLL has entered holdover mode
3
Frequency unlocked
Indicates that the DPLL has lost frequency lock
2
Frequency locked
Indicates that the DPLL has acquired frequency lock
1
Phase unlocked
Indicates that the DPLL has lost phase lock
0
Phase locked
Indicates that the DPLL has acquired phase lock
Table 106. IRQ Monitor for History Update, Frequency Limit, and Phase Slew Limit
Address
Bits
Bit Name
Description
0x0D05
[7:5]
Reserved
4
History updated
Indicates the occurrence of a tuning word history update
3
Frequency unclamped
Indicates a frequency limiter state transition from clamped to unclamped
2
Frequency clamped
Indicates a frequency limiter state transition from unclamped to clamped
1
Phase slew unlimited
Indicates a phase slew limiter state transition from slew limiting to not slew limiting
0
Phase slew limited
Indicates a phase slew limiter state transition from not slew limiting to slew limiting
Table 107. IRQ Monitor for Reference Inputs
Address
Bits
Bit Name
Description
0x0D06
7
Reserved
6
REFB validated
Indicates that REFB has been validated
5
REFB fault cleared
Indicates that REFB has been cleared of a previous fault
4
REFB fault
Indicates that REFB has been faulted
3
Reserved
2
REFA validated
Indicates that REFA has been validated
1
REFA fault cleared
Indicates that REFA has been cleared of a previous fault
0
REFA fault
Indicates that REFA has been faulted
0x0D07
7
Reserved
6
REFD validated
Indicates that REFD has been validated
5
REFD fault cleared
Indicates that REFD has been cleared of a previous fault
4
REFD fault
Indicates that REFD has been faulted
3
Reserved
2
REFC validated
Indicates that REFC has been validated
1
REFC fault cleared
Indicates that REFC has been cleared of a previous fault
0
REFC fault
Indicates that REFC has been faulted
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9571ACPZPEC-R7 | IC PLL CLOCK GEN 25MHZ 40LFCSP |
| AD9572ACPZLVD-R7 | IC PLL CLOCK GEN 25MHZ 40LFCSP |
| AD9573ARUZ-RL7 | IC PCI CLCOK GEN 25MHZ 16TSSOP |
| AD9575ARUZPEC | IC PLL CLOCK GEN 25MHZ 16TSSOP |
| AD9577BCPZ-R7 | IC CLOCK GENERATOR 40LFCSP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9559 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator |
| AD9559/PCBZ | 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 Multi-protocol line card dual clock RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| AD9559BCPZ | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| AD9559BCPZ-REEL7 | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| AD9559PCBZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。