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參數(shù)資料
| 型號(hào)： | AD7856ARS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC |
| 中文描述： | 8-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 |
| 封裝： | SHRINK, SOP-24 |
| 文件頁數(shù)： | 12/32頁 |
| 文件大?。?/td> | 294K |
| 代理商： | AD7856ARS |
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AD7856
–12–
REV. A
STATUS REGISTER
The arrangement of the Status Register is shown below. The status register is a read only register and contains 16 bits of data. The
status register is selected by first writing to the control register and putting two 1s in RDSLT1 and RDSLT0. The function of the
bits in the status register are described below. The power-up status of all bits is 0.
START
WRITE TO CONTROL REGISTER
SETTING RDSLT0 = RDSLT1 = 1
READ STATUS REGISTER
Figure 6. Flowchart for Reading the Status Register
MSB
ZERO
BUSY
SGL/
DIFF
CH2
CH1
CH0
PMGT1
PMGT0
RDSLT1
RDSLT0
2/
3
MODE
X
CALMD
CALSLT1
CALSLT0
STCAL
LSB
STATUS REGISTER BIT FUNCTION DESCRIPTION
Bit
Mnemonic
Comment
15
14
ZERO
BUSY
This bit is always 0.
Conversion/Calibration Busy Bit. When this bit is 1 it indicates that there is a conversion or
calibration in progress. When this bit is 0, there is no conversion or calibration in progress.
These four bits indicate the channel which is selected for conversion (see Table III).
13
12
11
10
9
8
7
6
5
SGL/
DIFF
CH2
CH1
CH0
PMGT1
PMGT0
RDSLT1
RDSLT0
2/
3
MODE
Power management bits. These bits, along with the
SLEEP
pin, will indicate if the part is in a
power-down mode or not. See Table VI for description.
Both of these bits are always 1, indicating it is the status register which is being read (see Table II).
Interface Mode Select Bit. With this bit at 0, the device is in Interface Mode 2. With this bit at 1,
the device is in Interface Mode 1. This bit is reset to 0 after every read cycle.
Don’t care bit.
Calibration Mode Bit. A 0 in this bit indicates a self calibration is selected, and a 1 in this bit
indicates a system calibration is selected (see Table IV).
Calibration Selection Bits and Start Calibration Bit. The STCAL bit is read as a 1 if a
calibration is in progress and as a 0 if there is no calibration in progress. The CALSLT1 and
CALSLT0 bits indicate which of the calibration registers are addressed for reading and writing
(see section on the Calibration Registers for more details).
4
3
X
CALMD
2
1
0
CALSLT1
CALSLT0
STCAL
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| AD7856ARSZ | 功能描述:IC ADC 14BIT 8CHAN 5V 24SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
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