參數(shù)資料
型號(hào): AD6652
廠商: Analog Devices, Inc.
英文描述: 12-Bit, 65 MSPS IF to Baseband Diversity Receiver
中文描述: 12位,65 MSPS的IF到基帶分集接收機(jī)
文件頁數(shù): 39/76頁
文件大小: 1839K
代理商: AD6652
AD6652
RCF OUTPUT SCALE FACTOR AND CONTROL
REGISTER
Register 0xA4 is a compound register used to configure several
aspects of the RCF register. Use Bits 3–0 to set the scale of the
fixed-point output mode. This scale value can also be used to
set the floating-point outputs in conjunction with Bit 6 of this
register.
Rev. 0 | Page 39 of 76
Bits 4 and 5 determine the output mo
up in fixed-point mode. The number f bits is determined by
l port configuration.
the seria
. Mode 00 sets the chip
de
o
4. In this mode, an
(x is
t
Output Mode Formats
Format
Floating Point 12 + 4
Floating Point 8 + 4
Fixed Point
Value
1x
01
00
Mo e 01 selects floating-point mode 8 +
8-bit mantissa is followed by a 4-bit exponent. In mode 1x
don’t care), the mode is 12 + 4, or 12-bit mantissa and 4-bi
exponent.
Table 17.
Normally, the AD6652 determines the exponent value that
optimizes numerical accuracy. However, if Bit 6 is set, the value
stored in Bits 3–0 is used to scale the output. This ensures
consistent scaling and accuracy during conditions that might
warrant predictable output ranges. If Bits 3–0 are represented by
RCF scale, the scaling factor in dB is given by
dB
)
log
20
)
(
10
×
=
Scale
RCF
Factor
Scaling
For an RCF scale of 0, the scaling factor is equal to 18.06 dB,
and for a maximum RCF scale of 15, the scaling factor is equal
to +72.25 dB.
If Bit 7 is set, the same exponent is used for both the real and
ry (I and Q) outputs. The exponent used is the one that
prevents numeric overflow at the expense of small signal
m a problem, because small
accuracy. However, this is seldo
numbers would represent 0 regardless of the exponent used.
Bit 8 is the RCF bank select bit used to program the register.
When this bit is 0, the lowest block of 128 is selected (taps 0 to
127). When high, the highest block is selected (taps 128 to 255).
It should be
Tap 127 is adjacent to Tap 128 and there are no paging issues.
noted that while the chip is computing filters,
put
l
el 1 can also be paired with Channel 0. This control bit is
Chann
used with polyphase distributed filtering.
652 channel operates in normal mode.
However, if Bit 10 is set, then the RCF is bypassed to Channel
BIST ee the User-Configurable Built-In Self-Test (BIST)
. S
section for more details.
imagina
Bit 9 selects where the input to each RCF originates. If Bit 9 is
clear, then the RCF input comes from the CIC5 normally
associated with the RCF. However, if the bit is set, then the in
comes from CIC5 Channel 1. The only exception is Channel 1,
which uses the output of CIC5 Channel 0 as its alternate. Using
this feature, each RCF can either operate on its own channe
data or be paired with the RCF of Channel 1. The RCF of
If Bit 10 is clear, the AD6
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