參數(shù)資料
型號(hào): 9LPRS462AGLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 240 MHz, OTHER CLOCK GENERATOR, PDSO8
封裝: 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-8
文件頁數(shù): 17/23頁
文件大?。?/td> 248K
代理商: 9LPRS462AGLFT
ICS9LPRS462
Low Power Clock for ATI RS/RD600 series chipsets for AMD CPUs
IDTTM/ICSTM
Low Power Clock for ATI RS/RD600 series chipsets for AMD CPUs
1378A—04/07/08
3
Pin Description (Continued)
PIN #
PIN NAME
TYPE
DESCRIPTION
33
*CLKREQC#
IN
Programmable Clock Request pin for SRC/ATIG/SB_SRC outputs. If output is selected
for control, then that output is controlled as follows:
0 = Enabled, 1 = Tri-state
34
ATIG2C_LPR
OUT
Complementary clock of low-power differential push-pull PCI-Express pair with
integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
35
ATIG2T_LPR
OUT
True clock of low-power differential push-pull PCI-Express pair with integrated 33 ohm
series resistor. (no 50ohm shunt resistor to GND needed)
36
ATIG1C_LPR
OUT
Complementary clock of low-power differential push-pull PCI-Express pair with
integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
37
ATIG1T_LPR
OUT
True clock of low-power differential push-pull PCI-Express pair with integrated 33 ohm
series resistor. (no 50ohm shunt resistor to GND needed)
38
GNDATIG
GND
Ground pin for the ATIG outputs
39
VDDATIG
PWR
Power supply for ATIG core, nominal 3.3V
40
ATIG0C_LPR
OUT
Complementary clock of low-power differential push-pull PCI-Express pair with
integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
41
ATIG0T_LPR
OUT
True clock of low-power differential push-pull PCI-Express pair with integrated 33 ohm
series resistor. (no 50ohm shunt resistor to GND needed)
42
SRC1C_LPR
OUT
Complement clock of low power differential SRC clock pair with integrated 33 ohm
series resistor. (no 50ohm shunt resistor to GND needed)
43
SRC1T_LPR
OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
44
VDDSRC
PWR
Supply for SRC, 3.3V nominal
45
GNDSRC
GND
Ground pin for the SRC outputs
46
SRC0C_LPR
OUT
Complement clock of low power differential SRC clock pair with integrated 33 ohm
series resistor. (no 50ohm shunt resistor to GND needed)
47
SRC0T_LPR
OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
48
NC
No Connect
49
GNDA
GND
Ground for the Analog Core
50
VDDA
PWR
3.3V Power for the Analog Core
51
CPUKG1C_LPR
OUT
Complementary signal of low-power differential push-pull AMD K8 "Greyhound" clock
with integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
52
CPUKG1T_LPR
OUT
True signal of low-power differential push-pull AMD K8 "Greyhound" clock with
integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
53
GNDCPU
GND
Ground pin for the CPU outputs
54
VDDCPU
PWR
Supply for CPU, 3.3V nominal
55
CPUKG0C_LPR
OUT
Complementary signal of low-power differential push-pull AMD K8 "Greyhound" clock
with integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
56
CPUKG0T_LPR
OUT
True signal of low-power differential push-pull AMD K8 "Greyhound" clock with
integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
57
*CLKREQA#
IN
Programmable Clock Request pin for SRC/ATIG/SB_SRC outputs. If output is selected
for control, then that output is controlled as follows:
0 = Enabled, 1 = Tri-state
58
GNDHTT
PWR
Ground pin for the HTT outputs
59
HTTCLK0
OUT
3.3V single ended 66MHz hyper transport clock
60
VDDHTT
PWR
Supply for HTT clocks, nominal 3.3V.
61
**PD
IN
Enter /Exit Power Down.
1 = Power Down, 0 = normal operation.
62
FS2/REF2
I/O
Frequency select latch input pin/ 3.3V 14.318MHz reference clock
63
FS1/REF1
I/O
Frequency select latch input pin/ 3.3V 14.318MHz reference clock
64
FS0/REF0
I/O
Frequency select latch input pin/ 3.3V 14.318MHz reference clock
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