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參數資料
| 型號： | 9LPRS462AGLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 240 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-8 |
| 文件頁數： | 12/23頁 |
| 文件大?。?/td> | 248K |
| 代理商： | 9LPRS462AGLFT |
ICS9LPRS462
Low Power Clock for ATI RS/RD600 series chipsets for AMD CPUs
IDTTM/ICSTM
Low Power Clock for ATI RS/RD600 series chipsets for AMD CPUs
1378A—04/07/08
2
Pin Description
PIN #
PIN NAME
TYPE
DESCRIPTION
1
GNDREF
GND
Ground pin for the REF outputs.
2
VDDREF
PWR
Ref, XTAL power supply, nominal 3.3V
3
X1
IN
Crystal input, nominally 14.318MHz
4
X2
OUT
Crystal output, nominally 14.318MHz
5
VDD48
PWR
Power pin for the 48MHz outputs and core. 3.3V
6
48MHz_0
OUT
48MHz clock output.
7
48MHz_1
OUT
48MHz clock output.
8
GND48
GND
Ground pin for the 48MHz outputs
9
SMBCLK
IN
Clock pin of SMBus circuitry, 5V tolerant.
10
SMBDAT
I/O
Data pin for SMBus circuitry, 5V tolerant.
11
RESET_IN#
IN
Real Time falling edge triggered input, When asserted, the part initiates a power up
reset with the SMBus being reset to it's power up values, and all PLL derived clocks
stopped for the duration of Power up Stabilization. REF outputs continue to run.
12
SRC7T_LPR
OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
13
SRC7C_LPR
OUT
Complement clock of low power differential SRC clock pair with integrated 33 ohm
series resistor. (no 50ohm shunt resistor to GND needed)
14
VDDSRC
PWR
Supply for SRC, 3.3V nominal
15
GNDSRC
GND
Ground pin for the SRC outputs
16
SRC6T_LPR
OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
17
SRC6C_LPR
OUT
Complement clock of low power differential SRC clock pair with integrated 33 ohm
series resistor. (no 50ohm shunt resistor to GND needed)
18
SRC5T_LPR
OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
19
SRC5C_LPR
OUT
Complement clock of low power differential SRC clock pair with integrated 33 ohm
series resistor. (no 50ohm shunt resistor to GND needed)
20
SRC4T_LPR
OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
21
SRC4C_LPR
OUT
Complement clock of low power differential SRC clock pair with integrated 33 ohm
series resistor. (no 50ohm shunt resistor to GND needed)
22
GNDSRC
GND
Ground pin for the SRC outputs
23
VDDSRC
PWR
Supply for SRC, 3.3V nominal
24
SRC3T_LPR
OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
25
SRC3C_LPR
OUT
Complement clock of low power differential SRC clock pair with integrated 33 ohm
series resistor. (no 50ohm shunt resistor to GND needed)
26
SRC2T_LPR
OUT
True clock of low power differential SRC clock pair with integrated 33 ohm series
resistor. (no 50ohm shunt resistor to GND needed)
27
SRC2C_LPR
OUT
Complement clock of low power differential SRC clock pair with integrated 33 ohm
series resistor. (no 50ohm shunt resistor to GND needed)
28
VDDSRC
PWR
Supply for SRC, 3.3V nominal
29
GNDSRC
GND
Ground pin for the SRC outputs
30
ATIG3T_LPR
OUT
True clock of low-power differential push-pull PCI-Express pair with integrated 33 ohm
series resistor. (no 50ohm shunt resistor to GND needed)
31
ATIG3C_LPR
OUT
Complementary clock of low-power differential push-pull PCI-Express pair with
integrated 33 ohm series resistor. (no 50ohm shunt resistor to GND needed)
32
*CLKREQB#
IN
Programmable Clock Request pin for SRC/ATIG/SB_SRC outputs. If output is selected
for control, then that output is controlled as follows:
0 = Enabled, 1 = Tri-state
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