300
CHAPTER 9 APPLICATIONS OF A/D CONVERTER
Figure 9-1. Format of A/D Converter Mode Register
(
μ
PD78054, 78054Y, 78064, 78064Y, 78078, 78078Y, 78083, 780058, 780058Y,
780308, 780308Y, 78058F, 78058FY, 78064B, 78075B, 78075BY subseries,
μ
PD78070A, 78070AY)
ADM3 ADM2 ADM1
Selects analog input channel
0
0
0
ANI0
0
0
1
ANI1
0
1
0
ANI2
0
1
1
ANI3
1
0
0
ANI4
1
0
1
ANI5
1
1
0
ANI6
1
1
1
ANI7
FR1
FR0
HSC
Selects A/D conversion time
Note 1
At f
X
= 5.0 MHz
At f
X
= 4.19 MHz
MCS = 1
MCS = 0
MCS = 1
MCS = 0
0
0
1
8
0/f
X
(setting prohibited)
Note 2
160/f
X
(32.0
μ
s)
80/f
X
(19.1
μ
s)
160/f
X
(38.1
μ
s)
0
1
1
40/f
X
(setting prohibited)
Note 2
80/f
X
(setting prohibited)
Note 2
40/f
X
(setting prohibited)
Note 2
80/f
X
(19.1
μ
s)
1
0
0
50/f
X
(setting prohibited)
Note 2
100/f
X
(20.0
μ
s)
50/f
X
(setting prohibited)
Note 2
100/f
X
(23.8
μ
s)
1
0
1
100/f
X
(20.0
μ
s)
200/fx (40.0
μ
s)
100/f
X
(23.8
μ
s)
200/f
X
(47.7
μ
s)
Others
Setting prohibited
TRG
Selects external trigger
0
No external trigger (software start)
1
Conversion started by external trigger (hardware start)
CS
Controls A/D conversion operation
0
Stops operation
1
Starts operation
Notes 1.
Set the A/D conversion time to 19.1
μ
s or longer.
2.
These settings are prohibited because the A/D conversion time is less than 19.1
μ
s.
Cautions 1. To reduce the power consumption of the A/D converter when the standby function is used,
stop the A/D conversion operation by clearing bit 7 (CS) to 0, and then execute the HALT or
STOP instruction.
2. To resume the A/D conversion operation which has been once stopped, clear the interrupt
request flag (ADIF) to 0 and then start the A/D conversion operation.
Remarks 1.
f
X
: main system clock oscillation frequency
2.
MCS : bit 0 of the oscillation mode select register (OSMS)
7
6
5
4
3
2
Symbol
1
0
FF80H
HSC
ADM
ADM1
ADM3 ADM2
FR0
FR1
TRG
CS
Address
At reset
R/W
01H
R/W