參數(shù)資料
型號(hào)： ZPSD601(V)E1
英文描述： Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
中文描述： 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備和嵌入式微-細(xì)胞（可編程邏輯，零功耗，4K的位的SRAM，26余個(gè)可編程輸入/輸出，通用PLD的有63個(gè)輸入）
文件頁(yè)數(shù)： 1/98頁(yè)
文件大小： 484K
代理商： ZPSD601(V)E1
12-1
Introduction
Preliminary
Programmable Peripheral
ZPSD6XX(V) Family
Field-Programmable Microcontroller Peripherals
with Embedded Micro
Cells
TM
The ZPSD6XX(V) series is a complete family of Field Programmable Microcontroller
Peripherals with Embedded Micro
Cell
TM
Programmable Logic. The devices are used to
rapidly implement highly integrated embedded control systems. The device family offers a
variety of functions including Zero Power PLDs (ZPLDs) with embedded Micro
Cells,
dynamically reconfigurable I/O Ports, programmable power management, EPROM, SRAM
and other functions.
Drawing from WSI’s years of experience with microcontroller (MCU) applications, the new
ZPSD6XX(V) product family radically simplifies the addition of programmable logic to
embedded system designs. New innovative “microcontroller-macrocells”, called Micro
Cells,
bring inexpensive programmable logic to MCU-based embedded system designs. Because
the Micro
Cells are directly connected to the system address/data bus, their NVM-based
programmable logic is tightly coupled to the software programs running in the system MCU.
The MCU’s ability to communicate directly with the Micro
Cells at the Flip-Flop level makes
ZPSD6XX(V) devices ideal for implementing the functions most frequently needed in
embedded systems.
Communicating with Microcontrollers – Regardless of the function they perform, all
microcontroller peripherals must communicate to the MCU. All MCUs require clock, data bus,
chip select, and read or write signals. To implement these signals using current industry
standard PLDs required the use of valuable product terms and macrocells in each PLD chip.
In the case of most embedded system designs, this left so few remaining usable PLD
resources to implement the peripheral function that designers dismissed the use of a PLD as
too expensive.
The Micro
Cell directly connects its PLD logic to the MCU. The MCU then sees the PLD in
the ZPSD6XX(V) as a decoded location in the address map. Direct read and write operations
can be easily and simply performed. Functions like counters and serial ports can be
constructed with programmable logic without any design time or resources lost interfacing to
the MCU.
J
A simple, programmable interface to 8 or 16 bit microcontrollers using either multiplexed
or non-multiplexed busses. The bus interface logic directly decodes microcontroller
control signals. Microcontroller families supported include the Intel 8031, 80196,
80186, 80C251 and 80386EX; Motorola 68HC11, 68HC16, 68HC12 and 683XX; Philips
8031 and 8051XA; National 16000; Zilog Z80 and Z8; and Neuron 3150.
J
Three ZPLDs (Zero Power PLDs) with 12 Output Micro
Cells and 23 Input
Micro
Cells, 63 inputs and 129 product terms. The ZPSD6XX(V) ZPLDs may be
used to efficiently implement a variety of logic functions including state machines and
address decoders for internal and external control. The ZPLD also provides seven
external chip select outputs.
J
Embedded Input and Output Micro
Cells that enable efficient implementation of user
defined system logic functions that require both microcontroller software and hardware
interaction.
J
Zero Power CMOS technology reduces the device standby current to 10 μA typical.
Active power is as low as 0.8 mA per bus MHz.
Key Features
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