TABLE
參數(shù)資料
型號(hào)： XRT83L314IB-L
廠商： Exar Corporation
文件頁(yè)數(shù)： 66/84頁(yè)
文件大小： 0K
描述： IC LIU T1/E1/J1 14CH 304TBGA
標(biāo)準(zhǔn)包裝： 27
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 14/14
規(guī)程： T1，E1，J1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 304-LBGA
供應(yīng)商設(shè)備封裝： 304-TBGA（31x31）
包裝： 托盤(pán)
XRT83L314
14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
65
TABLE 43: MICROPROCESSOR REGISTER 0XE2H BIT DESCRIPTION
TABLE 44: MICROPROCESSOR REGISTER 0XE3H BIT DESCRIPTION
D1
EXLOS
Extended Loss of Zeros
The number of zeros required to declare a Digital Loss of Signal is
extended to 4,096.
0 = Normal Operation
1 = Enables the EXLOS function
R/W
0
D0
ICT
In Circuit Testing
0 = Normal Operation
1 = Sets all output pins to "High" impedance for in circuit testing
R/W
0
GLOBAL REGISTER (0XE2H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
This Register Bit is Not Used
R/W
0
D6
RxTCNTL
Receive Termination Select Control
This bit sets the LIU to control the RxTSEL function with either the
individual channel register bit or the global hardware pin.
0 = Control of the receive termination is set to the register bits
1 = Control of the receive termination is set to the hardware pin
R/W
0
D5
D4
D3
D2
D1
D0
EQFLAG5
EQFLAG4
EQFLAG3
EQFLAG2
EQFLAG1
EQFLAG0
Equalizer Attenuation Flag
EQFLAG[5:0] is used to generate an interrupt condition for an
RLOS other than the default setting described in the datasheet. A
desired value can be programmed into this register. If EQFLAGE
is enabled in register 0x04h and if this 6-Bit binary word is equal to
the 6-Bit cable loss indicator, an interrupt will be generated.
R/W
0
GLOBAL REGISTER (0XE3H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
This Register Bit is Not Used
R/W
0
D6
Reserved
This Register Bit is Not Used
R/W
0
D5
Reserved
This Register Bit is Not Used
R/W
0
D4
Reserved
This Register Bit is Not Used
R/W
0
GLOBAL REGISTER (0XE1H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
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