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XRT83L314
14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
9
CONTROL FUNCTION
NAME
PIN
TYPE
DESCRIPTION
TEST
D4
I
Factory Test Mode
For normal operation, the TEST pin should be tied to ground.
NOTE: Internally pulled "Low" with a 50k
resistor.
ICT
A2
I
In Circuit Testing
When this pin is tied "Low", all output pins are forced to "High" impedance for
in circuit testing.
NOTE: Internally pulled "High" with a 50K
resistor.
CLOCK SECTION
NAME
PIN
TYPE
DESCRIPTION
MCLKin
A6
I
Master Clock Input
The master clock input can accept a wide range of inputs that can be used to
generate T1 or E1 clock rates on a per channel basis. See the register map for
details.
8kHzOUT
D8
O
8kHz Output Clock
MCLKE1out
A5
O
2.048MHz Output Clock
MCLKE1Nout
A4
O
2.048MHz, 4.096MHz, 8.192MHz, or 16.384MHz Output Clock
See the register map for programming details.
MCLKT1out
A7
O
1.544MHz Output Clock
MCLKT1Nout
B8
O
1.544MHz, 3.088MHz, 6.176MHz, or 12.352MHz Output Clock
See the register map for programming details.