REV. 1.0.3 HIGH PERFORMANCE QUAD PCI-EXPRESS UART TIMER OPERATION The following paragraphs describe the operation of the 16-bit Tim" />
參數(shù)資料
型號(hào)： XR17V354IB-0A-EVB
廠商： Exar Corporation
文件頁數(shù)： 14/66頁
文件大?。?/td> 0K
描述： EVAL BOARD FOR XR17V354-A 176BGA
產(chǎn)品培訓(xùn)模塊： PCIe UARTs
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，UART
嵌入式： 否
已用 IC / 零件： XR17V354
已供物品： 板
其它名稱： 1016-1611
XR17V354IB-0A-EVB-ND
XR17V354
21
REV. 1.0.3
HIGH PERFORMANCE QUAD PCI-EXPRESS UART
TIMER OPERATION
The following paragraphs describe the operation of the 16-bit Timer/Counter. The following conventions will be
used in this discussion:
■
’N’ is the 16-bit value programmed in the TIMER MSB, LSB registers
■
P +Q = N, where ’P’ and ’Q’ are approximately half of ’N’.
■
If N is even, P = Q = N/2.
■
If N is odd, P = (N – 1)/2 and Q = (N + 1)/2.
■
‘N’ can take any value from 0x0002 to 0xFFFF.
Timer Operation in One-Shot Mode:
In the one-shot mode, the Timer output will stay HIGH when started (default state) and will continue to stay
HIGH until it times out (reaches the terminal count of ‘N’ clocks), at which time it will become LOW and stay
LOW. If the Timer is re-started before the Timer times out, the counter is reset and the Timer will wait for
another time-out period before setting its output LOW (See Figure 6). If the Timer times out, re-starting the
Timer does not have any effect and a ’Stop Timer’ command needs to be issued first which will set the Timer
output to its default HIGH state. The Timer must be programmed while it is stopped since the following
operations are blocked after the Timer has been started:
■
Any write to TIMER MSB, LSB registers
■
Issue of any command other than ’Start Timer’, ’Stop Timer’ and ’Reset Timer’
Timer Operation in Re-triggerable Mode:
In the re-triggerable mode, when the Timer is started, the Timer output will stay HIGH until it reaches half of the
terminal count N (= P clocks) and toggle LOW and stay LOW for a similar amount of time (Q clocks). The
above step will keep repeating until the Timer is stopped at which time the output will become HIGH (default
state). See Figure 6. Also, after the Timer is started, re-starting the Timer does not have any effect in re-
triggerable mode. The Timer must be programmed while it is stopped since the following operations are
blocked when the Timer is running:
■
Any write to TIMER MSB, LSB registers
■
Issue of any command other than ’Stop Timer’ and ’Reset Timer’ (’Start Timer’ is not allowed)
Routing the Timer Output to MPIO[0] Pin:
MPIO[0] pin is by default (on power up or reset, for example) an input. However, whenever the Timer output is
routed to MPIO[0] pin,
■
MPIO[0] will be automatically selected as an output
■
MPIO[0] will become HIGH (the default state of Timer output)
■
All MPIO control registers (MPIOLVL, MPIOSEL etc) lose control over MPIO[0] and get the control back
only when the Timer output is de-routed from MPIO[0].
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