REV. 1.2.2 34 5.6 Internal Loopback Each UART channel provides an internal " />
參數(shù)資料
型號: XR17D154CV-0A-EVB
廠商: Exar Corporation
文件頁數(shù): 28/69頁
文件大小: 0K
描述: EVAL BOARD FOR XR17D154 144TQFP
標準包裝: 1
系列: *
XR17D154
xr
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
REV. 1.2.2
34
5.6
Internal Loopback
Each UART channel provides an internal loopback capability for system diagnostic. The internal loopback
mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX, RTS# and DTR# pins are held HIGH (idle or de-asserted state), and the CTS#, DSR#
CD# and RI# inputs are ignored.
5.7
UART CHANNEL CONFIGURATION REGISTERS AND ADDRESS DECODING
The 4 sets of UART configuration registers are decoded using address lines A9 to A11 as shown below:
FIGURE 18. INTERNAL LOOP BACK
A11
A10
A9
UART CHANNEL
SELECTION
0
1
0
1
0
2
0
1
3
TX[3:0]
RX [3:0]
Modem
/G
ener
al
P
ur
pos
e
C
ont
ro
l
Lo
gi
c
In
te
rn
al
B
u
sLi
ne
sa
nd
C
ontr
o
lS
igna
ls
RTS# [3:0]
MC R bit-4=1
VCC
TransmitShif t
Register
ReceiveShif t
Register
CTS# [3:0]
DTR# [3:0]
DSR# [3:0]
RI# [3:0]
CD# [3:0]
OP1#
OP2#
RTS#
CTS#
DTR#
DSR#
RI#
CD#
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