參數(shù)資料
型號(hào)： XCS05XL-3PQ256C
廠(chǎng)商： Xilinx, Inc.
英文描述： Spartan and Spartan-XL Families Field Programmable Gate Arrays
中文描述： 斯巴達(dá)和Spartan - xL的家庭現(xiàn)場(chǎng)可編程門(mén)陣列
文件頁(yè)數(shù)： 59/82頁(yè)
文件大小： 623K
代理商： XCS05XL-3PQ256C
Spartan and Spartan-XL Families Field Programmable Gate Arrays
DS060 (v1.6) September 19, 2001
Product Specification
www.xilinx.com
1-800-255-7778
59
R
Spartan-XL Pin-to-Pin Input Parameter Guidelines
Testing of switching parameters is modeled after testing
methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Pin-to-pin timing parameters are
derived from measuring external and internal test patterns
and are guaranteed over worst-case operating conditions
(supply voltage and junction temperature). Listed below are
representative values for typical pin locations and normal
clock loading.
Spartan-XL Setup and Hold
Capacitive Load Factor
Figure 35
shows the relationship between I/O output delay
and load capacitance. It allows a user to adjust the specified
output delay if the load capacitance is different than 50 pF.
For example, if the actual load capacitance is 120 pF, add
2.5 ns to the specified delay. If the load capacitance is 20
pF, subtract 0.8 ns from the specified output delay.
Figure 35
is usable over the specified operating conditions
of voltage and temperature and is independent of the output
slew rate control.
Symbol
Input Setup/Hold Times Using Global Clock and IFF
T
SUF
/T
HF
No Delay
Description
Device
Speed Grade
-5
Max
Units
-4
Max
XCS05XL
XCS10XL
XCS20XL
XCS30XL
XCS40XL
XCS05XL
XCS10XL
XCS20XL
XCS30XL
XCS40XL
1.1/2.0
1.0/2.2
0.9/2.4
0.8/2.6
0.7/2.8
3.9/0.0
4.1/0.0
4.3/0.0
4.5/0.0
4.7/0.0
1.6/2.6
1.5/2.8
1.4/3.0
1.3/3.2
1.2/3.4
5.1/0.0
5.3/0.0
5.5/0.0
5.7/0.0
5.9/0.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
T
SU
/T
H
Full Delay
Notes:
1.
2.
IFF = Input Flip-Flop or Latch
Setup time is measured with the fastest route and the lightest load. Hold time is measured using the furthest distance and a
reference load of one clock pin per IOB/CLB.
Figure 35:
Delay Factor at Various Capacitive Loads
DS060_35_080400
-2
0
20
40
60
80
Capacitance (pF)
D
100
120
140
-1
0
1
2
3
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參數(shù)描述
XCS05XL-3PQ256I 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
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XCS05XL-3PQ84C 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS05XL-3PQ84I 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
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