參數(shù)資料
型號: XC3S1400AN-5FGG484C
廠商: Xilinx Inc
文件頁數(shù): 68/123頁
文件大?。?/td> 0K
描述: IC FPGA SPARTAN-3AN 484FPGA
標準包裝: 60
系列: Spartan®-3AN
LAB/CLB數(shù): 2816
邏輯元件/單元數(shù): 25344
RAM 位總計: 589824
輸入/輸出數(shù): 372
門數(shù): 1400000
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 484-BBGA
供應商設備封裝: 484-FBGA
Spartan-3AN FPGA Family: DC and Switching Characteristics
DS557 (v4.1) April 1, 2011
Product Specification
49
Clock Buffer/Multiplexer Switching Characteristics
Table 36: Clock Distribution Switching Characteristics
Description
Symbol
Minimum
Maximum
Units
Speed Grade
-5
-4
Global clock buffer (BUFG, BUFGMUX, BUFGCE) I input to
O-output delay
TGIO
–0.22
0.23
ns
Global clock multiplexer (BUFGMUX) select S-input setup to I0 and
I1 inputs. Same as BUFGCE enable CE-input
TGSI
–0.56
0.63
ns
Frequency of signals distributed on global buffers (all sides)
FBUFG
0350
334
MHz
Notes:
1.
The numbers in this table are based on the operating conditions set forth in Table 10.
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