參數(shù)資料
型號： XC3S1400AN-5FGG484C
廠商： Xilinx Inc
文件頁數(shù)： 59/123頁
文件大?。?/td> 0K
描述： IC FPGA SPARTAN-3AN 484FPGA
標(biāo)準(zhǔn)包裝： 60
系列： Spartan®-3AN
LAB/CLB數(shù)： 2816
邏輯元件/單元數(shù)： 25344
RAM 位總計： 589824
輸入/輸出數(shù)： 372
門數(shù)： 1400000
電源電壓： 1.14 V ~ 1.26 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 484-BBGA
供應(yīng)商設(shè)備封裝： 484-FBGA
Spartan-3AN FPGA Family: DC and Switching Characteristics
DS557 (v4.1) April 1, 2011
Product Specification
40
LVCMOS12
Slow
2 mA
7.14
ns
4 mA
4.87
ns
6 mA
5.67
ns
Fast
2 mA
6.77
ns
4 mA
5.02
ns
6 mA
4.09
ns
QuietIO
2 mA
50.76
ns
4 mA
43.17
ns
6 mA
37.31
ns
PCI33_3
0.34
ns
PCI66_3
0.34
ns
HSTL_I
0.78
ns
HSTL_III
1.16
ns
HSTL_I_18
0.35
ns
HSTL_II_18
0.30
ns
HSTL_III_18
0.47
ns
SSTL18_I
0.40
ns
SSTL18_II
0.30
ns
SSTL2_I
0
ns
SSTL2_II
–
0.05
–
0.05
ns
SSTL3_I
0
ns
SSTL3_II
0.17
ns
Table 29: Output Timing Adjustments for IOB (Cont’d)
Convert Output Time from
LVCMOS25 with 12 mA Drive
and Fast Slew Rate to the
Following Signal Standard
(IOSTANDARD)
Add the
Adjustment Below
Units
Speed Grade
-5
-4
Differential Standards
LVDS_25
1.16
ns
LVDS_33
0.46
ns
BLVDS_25
0.11
ns
MINI_LVDS_25
0.75
ns
MINI_LVDS_33
0.40
ns
LVPECL_25
Input Only
LVPECL_33
RSDS_25
1.42
ns
RSDS_33
0.58
ns
TMDS_33
0.46
ns
PPDS_25
1.07
ns
PPDS_33
0.63
ns
DIFF_HSTL_I_18
0.43
ns
DIFF_HSTL_II_18
0.41
ns
DIFF_HSTL_III_18
0.36
ns
DIFF_HSTL_I
1.01
ns
DIFF_HSTL_III
0.54
ns
DIFF_SSTL18_I
0.49
ns
DIFF_SSTL18_II
0.41
ns
DIFF_SSTL2_I
0.82
ns
DIFF_SSTL2_II
0.09
ns
DIFF_SSTL3_I
1.16
ns
DIFF_SSTL3_II
0.28
ns
Notes:
1.
The numbers in this table are tested using the methodology
presented in Table 30 and are based on the operating conditions
2.
These adjustments are used to convert output- and
three-state-path times originally specified for the LVCMOS25
standard with 12 mA drive and Fast slew rate to times that
correspond to other signal standards. Do not adjust times that
measure when outputs go into a high-impedance state.
3.
Note that 16 mA drive is faster than 24 mA drive for the Slow slew
rate.
Table 29: Output Timing Adjustments for IOB (Cont’d)
Convert Output Time from
LVCMOS25 with 12 mA Drive
and Fast Slew Rate to the
Following Signal Standard
(IOSTANDARD)
Add the
Adjustment Below
Units
Speed Grade
-5
-4
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