參數(shù)資料
型號: X9530-B15I
廠商: Intersil Corporation
英文描述: Temperature Compensated Laser Diode Controller
中文描述: 溫度補償激光二極管控制器
文件頁數(shù): 7/30頁
文件大?。?/td> 479K
代理商: X9530-B15I
X9530
Characteristics subject to change without notice.
7 of 30
REV 3.7 8/26/04
www.xicor.com
I2FSO1–I2FSO0: C
URRENT
G
ENERATOR
2 F
ULL
S
CALE
O
UT
-
PUT
C
URRENT
S
ET
B
ITS
(N
ON
-
VOLATILE
)
These two bits are used to set the full scale output
current at the Current Generator 2 pin, I2. If both bits
are set to “0” (default), an external resistor connected
between pin R2 and Vss, determines the full scale
output current available at pin I2. The other three
options are indicated in the table below. The direction
of this current is set by bit I2DS in Control Register 0.
*No external resistor should be connected in these cases between
R2 and V
SS
.
L1DAS: LUT1 D
IRECT
A
CCESS
S
ELECT
B
IT
(N
ON
-
VOLATILE
)
When bit L1DAS is set to “0” (default), LUT1 is
addressed by the output of the on-chip A/D converter.
When bit L1DAS is set to “1”, LUT1 is addressed by
bits L1DA5– L1DA0.
D1DAS: D/A 1 D
IRECT
A
CCESS
S
ELECT
B
IT
(N
ON
-
VOLATILE
)
When bit D1DAS is set to “0” (default), the input to the
D/A converter 1 is a row of LUT1. When bit D1DAS is
set to “1”, that input is the content of the Control
register 3.
L2DAS: LUT2 D
IRECT
A
CCESS
S
ELECT
B
IT
(N
ON
-
VOLATILE
)
When bit L2DAS is set to “0” (default), LUT2 is
addressed by the output of the on-chip A/D converter.
When bit L2DAS is set to “1”, LUT2 is addressed by
bits L2DA5–L2DA0.
D2DAS: D/A 2 D
IRECT
A
CCESS
S
ELECT
B
IT
(N
ONVOLATILE
)
When bit D2DAS is set to “0” (default), the input to the
D/A converter 2 is a row of LUT2. When bit D2DAS is
set to “1”, that input is the content of the Control
register 4.
Control Register 6
This register is accessed by performing a Read or
Write operation to address 86h of memory.
WEL: W
RITE
E
NABLE
L
ATCH
(V
OLATILE
)
The WEL bit controls the Write Enable status of the
entire X9530 device. This bit must be set to “1” before
any other Write operation (volatile or nonvolatile).
Otherwise, any proceeding Write operation to memory
is aborted and no ACK is issued after a Data Byte.
The WEL bit is a volatile latch that powers up in the “0”
state (disabled). The WEL bit is enabled by writing
10000000
2
to Control register 6. Once enabled, the
WEL bit remains set to “1” until the X9530 is powered
down, and then up again, or until it is reset to “0” by
writing 00000000
2
to Control register 6.
A Write operation that modifies the value of the WEL
bit will not cause a change in other bits of Control
register 6.
Status Register – ADC Output
This register is accessed by performing a Read
operation to address 87h of memory.
AD5–AD0: A/D C
ONVERTER
O
UTPUT
B
ITS
(R
EAD
ONLY
)
These six bits are the binary output of the on-chip A/D
converter. The output is 000000
2
for minimum input
and 111111
2
for full scale input.
I2FSO1
0
0
1
1
I2FSO0
0
1
0
1
I2 Full Scale Output Current
Set externally via pin R2 (Default)
±
0.4mA*
±
0.85 mA*
±
1.3 mA*
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