
X9530
Characteristics subject to change without notice.
19 of 30
REV 3.7 8/26/04
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each Data Byte. After reaching the memory location 10Fh
the pointer “rolls over” to 00h, and the device continues to
output data for each ACK received.
A Read operation internal pointer can start at any
memory location from 00h through FEh, when the
Address Byte is 00h through FEh respectively. But it
starts at location 100h if the Address Byte is FFh.
When reading any of the control registers 1, 2, 3, or 4,
the Data Bytes are always the content of the
corresponding nonvolatile cells, even if bit NV1234 is
"0" (See “Control and Status Register Format”).
Data Protection
There are four levels of data protection designed into
the X9530: 1- Any Write to the device first requires
setting of the WEL bit in Control 6 register; 2- The
Block Lock can prevent Writes to certain regions of
memory; 3- The Write Protection pin disables any
writing to the X9530; 4- The proper clock count, data bit
sequence, and STOP condition is required in order to
start a nonvolatile write cycle, otherwise the X9530
ignores the Write operation.
WP: Write Protection Pin
When the Write Protection (WP) pin is active (LOW),
any Write operations to the X9530 is disabled, except
the writing of the WEL bit.
Signals
from the
Master
Signals from
the Slave
Signal at
SDA
S
t
a
r
t
Slave
Address
with
R/W=0
Address
Byte
A
C
K
A
C
K
1
0
1
0
0
S
t
o
p
A
C
K
1
1
1
0
0
Slave
Address
with
R/W=1
A
C
K
S
t
a
r
t
Last Read
Data Byte
First Read
Data Byte
A
C
K
Figure 19. Read Sequence