參數(shù)資料
型號(hào): X9530-B15I
廠商: Intersil Corporation
英文描述: Temperature Compensated Laser Diode Controller
中文描述: 溫度補(bǔ)償激光二極管控制器
文件頁(yè)數(shù): 6/30頁(yè)
文件大小: 479K
代理商: X9530-B15I
X9530
Characteristics subject to change without notice.
6 of 30
REV 3.7 8/26/04
www.xicor.com
I2DS: C
URRENT
G
ENERATOR
2 D
IRECTION
S
ELECT
B
IT
(N
ON
-
VOLATILE
)
The I2DS bit sets the polarity of Current Generator 2,
DAC2. When this bit is set to “0” (default), the Current
Generator 2 of the X9530 is configured as a Current
Source. Current Generator 2 is configured as a Current
Sink when the I2DS bit is set to “1”. See Figure 5.
Control Register 1
This register is accessed by performing a Read or Write
operation to address 81h of memory. This byte’s volatility
is determined by bit NV1234 in Control register 0.
L1DA5–L1DA0: LUT1 D
IRECT
A
CCESS
B
ITS
When bit L1DAS (bit 4 in Control register 5) is set to
“1”, LUT1 is addressed by these six bits, and it is not
addressed by the output of the on-chip A/D converter.
When bit L1DAS is set to “0”, these six bits are ignored
by the X9530. See Figure 7.
A value between 00h (00
10
) and 3Fh (63
10
) may be
written to these register bits, to select the corresponding
row in LUT1. The written value is added to the base
address of LUT1 (90h).
Control Register 2
This register is accessed by performing a read or write
operation to address 82h of memory. This byte’s
volatility is determined by bit NV1234 in Control
register 0.
L2DA5–L2DA0: LUT2 D
IRECT
A
CCESS
B
ITS
When bit L2DAS (bit 6 in Control register 5) is set to
“1”, LUT2 is addressed by these six bits, and it is not
addressed by the output of the on-chip A/D converter.
When bit L2DAS is set to “0”, these six bits are ignored
by the X9530. See Figure 7.
A value between 00h (00
10
) and 3Fh (63
10
) may be
written to these register bits, to select the corresponding
row in LUT2. The written value is added to the base
address of LUT2 (D0h).
Control Register 3
This register is accessed by performing a Read or Write
operation to address 83h of memory. This byte’s volatility
is determined by bit NV1234 in Control register 0.
D1DA7–D1DA0: D/A 1 D
IRECT
A
CCESS
B
ITS
When bit D1DAS (bit 5 in Control register 5) is set to
“1”, the input to the D/A converter 1 is the content of
bits D1DA7–D1DA0, and it is not a row of LUT1. When
bit D1DAS is set to “0” (default) these eight bits are
ignored by the X9530. See Figure 6.
Control Register 4
This register is accessed by performing a Read or
Write operation to address 84h of memory. This byte’s
volatility is determined by bit NV1234 in Control
register 0.
D2DA7–D2DA0: D/A 2 D
IRECT
A
CCESS
B
ITS
When bit D2DAS (bit 7 in Control register 5) is set to
“1”, the input to the D/A converter 2 is the content of
bits D2DA7–D2DA0, and it is not a row of LUT2. When
bit D2DAS is set to “0” (default) these eight bits are
ignored by the X9530. (See Figure 6).
Control Register 5
This register is accessed by performing a Read or
Write operation to address 85h of memory.
I1FSO1–I1FSO0: C
URRENT
G
ENERATOR
1 F
ULL
S
CALE
O
UTPUT
S
ET
B
ITS
(N
ON
-
VOLATILE
)
These two bits are used to set the full scale output
current at the Current Generator 1 pin, I1. If both bits
are set to “0” (default), an external resistor connected
between pin R1 and Vss, determines the full scale
output current available at pin I1. The other three
options are indicated in the table below. The direction
of this current is set by bit I1DS in Control register 0.
See Figure 5.
*No external resistor should be connected in these cases between
R1 and V
SS
.
I1FSO1
0
0
1
1
I1FSO0
0
1
0
1
I1 Full Scale Output Current
Set externally via pin R1 (Default)
±
0.4mA*
±
0.85 mA*
±
1.3 mA*
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