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參數資料
| 型號： | VSC7217 |
| 廠商： | Vitesse Semiconductor Corporation. |
| 英文描述： | Multi-Gigabit Interconnect Chip |
| 中文描述： | 千兆位級互連芯片 |
| 文件頁數： | 14/36頁 |
| 文件大?。?/td> | 516K |
| 代理商： | VSC7217 |
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VITESSE
Preliminary Datasheet
VSC7217
Mutli-Gigabit Interconnect Chip
Page 14
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 805/388-3700 FAX: 805/987-5896
6/14/00
G52325-0
,
Rev. 3.0
entered whenever four consecutive invalid transmissions have been detected or when the occurrences of invalid
transmission outnumber those of valid transmission by four. The relative occurrences of invalid vs. valid trans-
missions are monitored with a simple up/down counter that increments when an invalid transmission is detected
and decrements otherwise. The LSSM transitions to the LOSS_OF_SYNC state when the counter reaches four,
and the counter is reset. A state diagram for the invalid transmission counter is shown in Figure10. The
VSC7217 receiver will stay in the LOSS_OF_SYNC state until a valid Comma pattern is detected. Note that the
RESY NC state is entered whenever the 10B framing boundary is changed, and whenever the Word Sync
Sequence is received. When
ENDEC
is LOW the
ERRn
,
K CHn
and
IDLEn
outputs are re-defined and the
decoder and associated LSSM logic in each channel is unused.
Figure 9: State Diagram of the Loss of Synchronization State Machine
Figure 10: State Diagram of the Invalid Transmission Counter
RESYNC
IDLEn
=1
ERRn
=1
KCHn
=1
Four Consecutive
Invalid Transmissions
or
Valid Comma
(K28.1, K28.5, K28.7)
Valid Non-Comma
Invalid minus Valid
Transmissions is > 4
LOSS_OF_SYNC
IDLEn
=0
ERRn
=1
KCHn
=1
Valid Comma
SYNC_ACQUIRED
IDLEn
=X
ERRn
=0
KCHn
=X
IDLEn
=X
ERRn
=1
KCHn
=0
or
Four Consecutive Commas
or
Mis-Aligned Comma
Invalid Transmission
(Unconditional)
Invalid
Valid
Invalid
Valid
Invalid
Valid
Invalid
Valid
0
1
2
3
4
Mis-Aligned
Comma
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相關代理商/技術參數 |
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|---|---|
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