參數(shù)資料
型號(hào)： VL6524
廠商： 意法半導(dǎo)體
英文描述： VGA single-chip camera module
中文描述： 顯卡單芯片相機(jī)模塊
文件頁數(shù)： 33/70頁
文件大?。?/td> 505K
代理商： VL6524
VL6524/VS6524
Host communication - I2C control interface
33/70
For the master reading from the slave the device address is followed by the contents of last
register index that the previous read or write message accessed. If multiple data bytes are
read then the internal register index is automatically incremented after each byte of data
read. A read message is terminated by the bus master generating a negative acknowledge
after reading a final byte of data.
A message can only be terminated by the bus master, either by issuing a stop condition, a
repeated start condition or by a negative acknowledge after reading a complete byte during
a read operation.
Detailed overview of the message format
Figure 19.
Detailed overview of message format
The V2W generic message format consists of the following sequence
1.
Master generates a START condition to signal the start of new message.
2.
Master outputs, MS bit first, a 7-bit device address of the slave the master is trying to
communicate with followed by a R/W bit.
SDA
SCL
S
or
Sr
1
2
7
8
9
Sr
or
P
MSB
LSB
START
or
repeated
START
condition
ACK
signal
from
slave
STOP
or
repeated
Start
condition
Device Address
1
2
7
8
9
MSB
LSB
S
(Sr)
7-bit Device
Address
R/W
A
A
(A)
8-bit Data
P
(Sr)
Data byte from
transmitter
R/W=0 - Master
R/W=1 - Slave
ACK
signal
from
receiver
R/W
Bit
0 - Write
1 - Read
Sr
P
1
2
3
4
5
6
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VL6524Q0MH 制造商:STMicroelectronics 功能描述:VGA SINGLE-CHIP CAMERA MODULE - Trays
VL6524QOMH 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:VGA single-chip camera module
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VL6624 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1.3 Megapixel single-chip camera module
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