
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Preliminary User’s Manual U16228EJ1V0UD
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(2) Measurement of two pulse widths with free-running counter
When 16-bit timer counter 0n (TM0n) is operated in free-running mode (see Figure 6-21), it is possible to
simultaneously measure the pulse widths of the two signals input to the TI00n pin and the TI01n pin.
When the edge specified by bits 4 and 5 (ES0n0 and ES0n1) of prescaler mode register 0n (PRM0n) is input to
the TI00n pin, the value of TM0n is taken into 16-bit timer capture/compare register 01n (CR01n) and an interrupt
request signal (INTTM01n) is set.
Also, when the edge specified by bits 6 and 7 (ES1n0 and ES1n1) of PRM0n is input to the TI01n pin, the value
of TM0n is taken into 16-bit timer capture/compare register 00n (CR00n) and an interrupt request signal
(INTTM00n) is set.
Any of three edges
rising, falling, or both edgescan be selected as the valid edge of the TI00n pin and the
TI01n pin, specified using bits 4 and 5 (ES0n0 and ES0n1) and bits 6 and 7 (ES1n0 and ES1n1) of PRM0n,
respectively.
For valid edge detection of the TI00n and TI01n pins, sampling is performed at the interval selected by prescaler
mode register 0n (PRM0n), and a capture operation is only performed when a valid level is detected twice, thus
eliminating noise with a short pulse width.
Figure 6-21. Control Register Settings for Measurement of Two Pulse Widths with Free-Running Counter
(a) 16-bit timer mode control register 0n (TMC0n)
0000
TMC0n3
0
TMC0n2
1
TMC0n1
0/1
OVF0n
0
TMC0n
Free-running mode
(b) Capture/compare control register 0n (CRC0n)
00000
CRC0n2
1
CRC0n1
0
CRC0n0
1
CRC0n
CR00n used as capture register
Captures valid edge of TI01n pin to CR00n
CR01n used as capture register
Remark
0/1: Setting 0 or 1 allows another function to be used simultaneously with pulse width measurement.
For details, see Figures 6-3 and 6-4.
n = 0:
PD780131, 780132
n = 0, 1:
PD780133, 780134, 78F0134, 780136, 780138, 78F0138