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參數(shù)資料
| 型號(hào)： | UPD77112GC |
| 廠商： | NEC Corp. |
| 元件分類(lèi)： | 數(shù)字信號(hào)處理 |
| 英文描述： | 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| 中文描述： | 16位定點(diǎn)數(shù)字信號(hào)處理器 |
| 文件頁(yè)數(shù)： | 28/80頁(yè) |
| 文件大?。?/td> | 451K |
| 代理商： | UPD77112GC |
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Data Sheet U12801EJ4V0DS00
28
μ
PD77110, 77111, 77112
7.1.2 Interrupt vector table
Addresses 0x200 through 0x23F of the instruction memory are entry points (vectors) of interrupts. Four
instruction addresses are assigned to each interrupt source.
Vector
Interrupt Source
0x200
Reset
0x204
0x208
0x20C
Reserved
0x210
INT1
0x214
INT2
0x218
INT3
0x21C
INT4
0x220
SI1 input
0x224
SO1 output
0x228
SI2 input
0x22C
SO2 output
0x230
HI input
0x234
HO output
0x238
0x23C
Reserved
Cautions
1. Although reset is not an interrupt, it is handled like an interrupt as an entry to a vector.
2. It is recommended that unused interrupt source vectors be used to branch an error
processing routine.
3. Because a vector area also exists in the internal RAM area of the mask ROM model, this
area must be booted up. In addition, because the entry address after reset is 0x200,
address 0x200 must be booted up even when the internal instruction RAM and interrupts are
not used.
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