參數(shù)資料
型號： UPD77111GK
廠商： NEC Corp.
元件分類： 數(shù)字信號處理
英文描述： 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS
中文描述： 16位定點(diǎn)數(shù)字信號處理器
文件頁數(shù)： 25/80頁
文件大?。?/td> 451K
代理商： UPD77111GK
Data Sheet U12801EJ4V0DS00
25
μ
PD77110, 77111, 77112
5.1.1 Self boot
The boot-up ROM transfers the instruction code stored in the data memory space to the instruction RAM, based
on the boot parameter written to address 0x4000 of the Y data memory. Generally, with a mask ROM model
(
μ
PD77111 or 77112), this function is implemented by storing the instructions to be booted in the data ROM.
In addition, the instructions to be booted can be also stored in an external data area in the form of flash ROM, and
self boot can be executed from this external data area.
With the
μ
PD77110, the value of address 0x4000 of the Y data memory is undefined on power application,
because this address is in RAM. Therefore, with the
μ
PD77110, the self boot mode cannot be selected on power
application, and host boot must be executed. This also applies when the PLL is initialized. By writing a boot
parameter to address 0x4000 or those that follow of the Y data memory, self boot can be executed when the RESET
signal is subsequently input (except the reset that initializes the PLL). In this case, however, the instructions to be
booted are only those at address 0x0200 through 0x0FFF of the instruction RAM.
5.1.2 Host boot
In this boot mode, a boot parameter and instruction code are obtained via the host interface, and transferred to the
instruction RAM.
With the
μ
PD77110, the host boot mode is used on power application. The boot instruction area is the instruction
RAM from addresses 0x0200 through 0x0FFF. To boot up the instruction RAM from 0x4000 through 0xBFFF, host
reboot is used.
5.2 Reboot
By calling the next reboot entry from the program, the contents of the instruction RAM can be rewritten. In
particular, the
μ
PD77110 has a reboot function that boots up the instruction RAM from 0x4000 through 0xBFFF.
Reboot Mode
Entry Address
Word reboot
0x2
X memory
Byte reboot
0x4
Word reboot
0x1
Self boot
Y memory
Byte reboot
0x3
Host boot
Host reboot
0x6 (
μ
PD77110)
0x5 (
μ
PD77111, 77112)
5.2.1 Self reboot
The instruction codes stored in the data memory are transferred to the instruction RAM.
This boot mode cannot be used with the
μ
PD77110.
Set the following parameters and call the entry address of the corresponding reboot mode to execute self reboot.
R7L: Number of instruction steps for rebooting
DP3: First address of X memory in which instruction codes are stored (in the case of reboot from X memory),
or first address of the instruction memory to be loaded (in the case of reboot from Y memory)
DP7: First address of instruction memory to be loaded (in the case of reboot from X memory), or first address
of X memory in which instruction codes are stored (in the case of reboot from Y memory)
相關(guān)PDF資料
PDF描述
UPD77110 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS
UPD77111 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS
UPD77112 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS
UPD77112GC 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS
UPD780016Y 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
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