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5
μ
PD75236
CONTENTS
1.
PIN FUNCTIONS .........................................................................................................................................7
1.1
PORT PINS ...........................................................................................................................................................7
1.2
NON-PORT PINS..................................................................................................................................................9
1.3
PIN INPUT/OUPUT CIRCUIT LIST ...................................................................................................................11
1.4
RECOMMENDED CONNECTIONS OF
μ
PD75236 UNUSED PINS ............................................................... 15
2.
μ
PD75236 ARCHITECTURE AND MEMORY MAP................................................................................ 16
2.1
DATA MEMORY BANK CONFIGURATION AND ADDRESSING MODE ..................................................... 16
2.2
GENERAL REGISTER BANK CONFIGURATION............................................................................................ 19
2.3
MEMORY MAPPED I/O.................................................................................................................................... 22
3.
INTERNAL CPU FUNCTIONS.................................................................................................................. 28
3.1
PROGRAM COUNTER (PC): 14 BITS .............................................................................................................. 28
3.2
PROGRAM MEMORY (ROM): 16256 WORDS
×
8 BITS ............................................................................... 28
3.3
DATA MEMORY................................................................................................................................................ 30
3.4
GENERAL REGISTER: 8
×
4 BITS
×
4 BANKS ............................................................................................... 32
3.5
ACCUMULATOR ............................................................................................................................................... 33
3.6
STACK POINTER (SP) AND STACK BANK SELECT REGISTER (SBS) ....................................................... 33
3.7
PROGRAM STATUS WORD (PSW): 8 BITS................................................................................................... 36
3.8
BANK SELECT REGISTER (BS) ....................................................................................................................... 40
4.
PERIPHERAL HARDWARE FUNCTIONS ............................................................................................... 41
4.1
DIGITAL INPUT/OUTPUT PORTS................................................................................................................... 41
4.2
CLOCK GENERATOR........................................................................................................................................ 50
4.3
CLOCK OUTPUT CIRCUIT................................................................................................................................ 58
4.4
BASIC INTERVAL TIMER ................................................................................................................................. 61
4.5
TIMER/EVENT COUNTER................................................................................................................................ 63
4.6
WATCH TIMER.................................................................................................................................................. 69
4.7
TIMER/PULSE GENERATOR ........................................................................................................................... 71
4.8
EVENT COUNTER............................................................................................................................................. 77
4.9
SERIAL INTERFACE.......................................................................................................................................... 79
4.10 A/D CONVERTER ........................................................................................................................................... 113
4.11 BIT SEQUENTIAL BUFFER: 16 BITS............................................................................................................. 119
4.12 FIP CONTROLLER/DRIVER ............................................................................................................................ 119
5.
INTERRUPT FUNCTIONS ...................................................................................................................... 131
5.1
INTERRUPT CONTROL CIRCUIT CONFIGURATION................................................................................... 131
5.2
INTERRUPT CONTROL CIRCUIT HARDWARE DEVICES ........................................................................... 133
5.3
INTERRUPT SEQUENCE ................................................................................................................................ 138
5.4
MULTI-INTERRUPT SERVICE CONTROL ..................................................................................................... 139
5.5
VECTOR ADDRESS SHARING INTERRUPT SERVICING ........................................................................... 141
6.
STANDBY FUNCTIONS......................................................................................................................... 142
6.1
STANDBY MODE SETTING AND OPERATING STATE .............................................................................. 142
6.2
STANDBY MODE RELEASE .......................................................................................................................... 144
6.3
OPERATION AFTER STANDBY MODE RELEASE ....................................................................................... 146