參數(shù)資料
型號: UPD6708GS
廠商: NEC Corp.
英文描述: IEBusa Inter Equipment Busa PROTOCOL CONTROL LSI
中文描述: IEBusa設(shè)備布薩間協(xié)議控制大規(guī)模集成電路
文件頁數(shù): 5/72頁
文件大小: 292K
代理商: UPD6708GS
5
μ
PD6708
1.
PIN FUNCTIONS
1.1
List of Pin Functions
Pin No.
Pin Name
Input/Output
Function
I/O Format
At Reset
1
SCK
Input
Input for serial clock used to interface with microcontroller.
CMOS input
Input
2
SI
Input
Input for serial data used to interface with microcontroller.
CMOS input
Input
3
SO
Output
Output for serial data used to interface with microcontroller.
CMOS output
High level
4
IRQ
Output
Output used by interrupt request signals generated by
communication and command execution results.
Used as operation start request signal to microcontroller.
The interrupt request signal is output for 8
μ
s or longer
at high level.
CMOS output
Low level
5
R/W
Input
Input for switching serial interface read/write mode.
When high, it is in the read mode. When low, it is in the
write mode.
When this pin is low and C/D pin high, the read and write
modes can be switched by commands input from the serial
interface.
CMOS input
Input
6
7
XI
XO
––
Connection pins for system clock resonator.
Use a 12- or 12.58-MHz crystal, or ceramic resonator.
Frequency precision depends on the communication mode
used.
Mode 0
:
±
1.5 %
Mode 1
:
±
1.5 %
Mode 2
:
±
0.5 %
––
(Oscillation
continues)
8
GND
––
Ground
––
––
9
BUS–
BUS+
Input/output
Input/output for IEBus.
––
High
impedance
10
11
AV
DD
––
IEBus driver/receiver analog power supply. Connect to V
DD
.
––
––
12
C/D
Input
Input used to switch between processing data input to the
serial interface as commands or data.
When set to high, data is processed as commands; when
low, data is processed as data.
When this pin is high and R/W pin low, the read and write
modes can be switched by commands input from the serial
interface.
CMOS input
Input
13
CS
Input
Chip select input.
When low, serial interface input is enabled.
When high, serial clock (SCK) input is disabled, SO pin
becomes high impedance, and the serial clock counter is
reset.
The status of CS pin is not affected by IEBus transmit and
receive operations.
CMOS input
Input
14
RESET
Input
System reset signal input pin.
Low input effects a reset.
Always input the low signal for 6
μ
s or longer after turning
on the power.
CMOS input
Input
15
TEST
Input
Always connect this pin to the V
DD
.
CMOS input
––
16
V
DD
––
Positive power supply input. Apply a voltage of 5 V
±
10 %.
––
––
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