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參數(shù)資料
| 型號： | UPD6708GS |
| 廠商： | NEC Corp. |
| 英文描述： | IEBusa Inter Equipment Busa PROTOCOL CONTROL LSI |
| 中文描述： | IEBusa設(shè)備布薩間協(xié)議控制大規(guī)模集成電路 |
| 文件頁數(shù)： | 28/72頁 |
| 文件大?。?/td> | 292K |
| 代理商： | UPD6708GS |
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28
μ
PD6708
4.3
Reset Mode
When the RESET pin is driven low, the
μ
PD6708 enters the reset mode. To release the reset mode, the RESET pin
must be driven high and a reset release command input.
There are two methods of resetting the
μ
PD6708, as follows.
(1)
Resetting with RESET pin
If the RESET pin is driven low, the
μ
PD6708 will enter the reset mode.
To exit the reset mode, drive the RESET pin high and set bit 7 of CMR to ‘0’.
(2)
Resetting by software
If bit 7 of CMR is set to ‘1’ with the RESET pin fixed high, the
μ
PD6708 will enter the reset mode.
To exit the reset mode, set bit 7 to ‘0’.
When powering on, the RESET pin must be driven low to execute a reset.
The
μ
PD6708 will be in the following condition directly after leaving the reset mode.
<1>
IEBus slave status is intialized.
Table 4-6. Slave Status Values after Leaving Reset Mode
Bit
Value
Meaning
Bit 7
1
Up to mode 2 is supported
Bit 6
0
Bit 5
0
Always ‘0’
Bit 4
0
The slave transmission section has stopped.
Bit 3
0
Always ‘0’
Bit 2
0
Unit is not locked.
Bit 1
0
Slave receive buffer is empty.
Bit 0
0
Slave transmit buffer is empty.
<2>
WDB and RDB are empty.
<3>
Reception is disabled.
Slave reception and broadcast reception are not acknowledged.
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